Welcome to the Spring 2019 CS152 and CS252 web page. This semester the undergraduate and graduate computer architecture classes will be sharing lectures, and so the course web page has been combined.
CS152 is intended to provide a foundation for students interested in performance programming, compilers, and operating systems, as well as computer architecture and engineering. Our goal is for you to better understand how software interacts with hardware, and to understand how trends in technology, applications, and economics drive continuing changes in the field. The course will cover the different forms of parallelism found in applications (instruction-level, data-level, thread-level, gate-level) and how these can be exploited with various architectural features. We will cover pipelining, superscalar, speculative and out-of-order execution, vector machines, VLIW machines, multithreading, graphics processing units, and parallel microprocessors. We will also explore the design of memory systems including caches, virtual memory, and DRAM. An important part of CS152 is series of lab assignments using real microprocessor designs implemented in the Chisel hardware description language, and running as simulators and FPGA emulators hosted in the Amazon cloud (FireSim). These simulators will give you an in-depth look at a variety of processor architectural techniques. Our objective is that you will understand all the major concepts used in modern microprocessors by the end of the semester.
CS252 is intended to provide essential background for students intending to pursue research in computer architecture or related fields, and also provides preparation for the Berkeley EECS computer architecture oral prelim examination. An important part of CS252 is reading and discussion of classic architecture papers, as well as a substantial course project.
Week | Date | Lecture |
Readings 5th Edition |
Readings 6th Edition |
Assignments |
1 | Wed Jan 23 | L1: Introduction, Early Machines PPTX PDF | Ch. 1, App. A | Ch. 1, App. A | |
Fri Jan 25 | CS152 No section | ||||
2 | Mon Jan 28 | L2: Simple Machine Implementations, Microcoding PPTX PDF | |||
Mon Jan 28 | CS252 No Readings Discussion | ||||
Wed Jan 30 | L3: Pipelining PPTX PDF | App. C.1-C.3 | App. C.1-C.3 | PS 1 (PDF, DOC) | |
Fri Feb 1 | CS152 Section 1: Microcode, Introduction to RISC-V tools and Lab 1 Overview |
Lab 1 Microcode Handout |
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3 | Mon Feb 4 | L4: Pipelining II PPTX PDF | App. C.4-C.6 | App. C.4-C.6 | |
Mon Feb 4 | CS252 Readings Discussion |
"Design
of the B5000 System", Lonergan, King, 1961
"Architecture of the IBM System/360", Amdahl, Blaauw, Brooks, 1964 |
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Wed Feb 6 | L5: Memory Hierarchy PPTX PDF | App. B.1-B.2, Ch. 2.1-2.3 | App. B.1-B.2, Ch. 2.1-2.2 | ||
Fri Feb 8 | CS152 Section 2: Pipelining review | ||||
4 | Mon Feb 11 | L6: Memory Hierarchy II PPTX PDF | App. B.3 | App. B.3 | PS 1 due at start of class |
Mon Feb 11 | CS252 Readings Discussion |
"The
Case for the Reduced Instruction Set Computer",
Patterson, Ditzel, 1980
Comments on the "The Case for the RISC", Clark, Strecker, 1980 "Performance from architecture: comparing a RISC and CISC with similar hardware organization", Bhandarkar, Clark, 1991 |
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Wed Feb 13 | L7: Memory Hierarchy III PPTX PDF |
PS 2 (PDF,
DOC) Handout 2 |
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Fri Feb 15 | CS152 Section 3: PS 1 Review | PS 1 solutions | |||
5 | Mon Feb 18 | President's Day Holiday | |||
Wed Feb 20 | L8: Address Translation and Protection PPTX PDF | App. B.4-7 | App. B.4-7 | Lab 1 due | |
Fri Feb 22 | CS152 Section 4: Lab 2 Overview |
Lab 2 |
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6 | Mon Feb 25 | L9: Virtual Memory PPTX PDF | |||
Mon Feb 25 | CS252 Readings Discussion |
"IBM's
Single-Processor Supercomputer Efforts", Smotherman, Spicer,
CACM, 53(1), 2010 "Implementation of Precise Interrupts in Pipelined Processors" , Smith, Pleszkun, ISCA, 1985 (IEEE Trans. Computer Journal version) "Parallel Operation in the Control Data 6600", Thornton, Proceedings of the Fall Joint Computers Conference, vol 26, pp. 33-40, 1964 |
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Wed Feb 27 | L10: Complex pipelines, out-of-order issue, register renaming PPTX PDF | Ch. 3.1,3.4-3.5 | Ch. 3.1,3.4-3.6 |
PS 2 due. CS252 project proposals due. |
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Fri Mar 1 | CS152 Section 5: Memory hierarchy and PS 2 review | PS 2 solutions | |||
7 | Mon Mar 4 | Midterm 1: (L1-L9) Solutions | |||
Mon Mar 4 | CS252 No Readings Discussion | ||||
Wed Mar 6 | L11: Out-of-order execution PPTX PDF | Ch. 3.6, 3.8 | Ch. 3.6, 3.8 | PS 3 (PDF, DOC) | |
Fri Mar 8 | CS152 Section 6: Lab 3 Overview, Parameterizing OoO Cores PDF | ||||
8 | Mon Mar 11 | L12: Branch Prediction and Advanced Out-of-Order Superscalars PPTX PDF | Ch. 3.3,3.9-3.10 |
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Mon Mar 11 | CS252 Project Proposal Discussion | ||||
Wed Mar 13 | L13: VLIW PPTX PDF | Ch. 3.2,3.7 | Ch. 3.2,3.7 | Lab 3 | |
Fri Mar 15 | CS152 Section 7: Out-of-order Execution | Lab 2 due (Extension) | |||
9 | Mon Mar 18 | L14: Multithreading (Guest Lecturer: David Biancolin) PPTX PDF | Ch. 3.12 | Ch. 3.11 | PS 3 due |
Mon Mar 18 | CS252 Readings Discussion (Meeting Postponed, but summaries still due) |
"An
Efficient Algorithm for Exploiting Multiple Arithmetic units",
Tomasulo, IBM Journal, January 1967 "Decoupled Access/Execute Computer Architectures", Smith, ISCA 1982 (ACM TOCS version) "The MIPS R10000 Superscalar microprocessor", Yeager, IEEE Micro 16(2), 1996 |
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Wed Mar 20 | L15: Vectors PPTX PDF | Ch. 4.1-4.3 (App. G) | PS 4 (PDF, DOC) | ||
Fri Mar 22 | CS152 Section 8: PS 3 review | PS 3 Solutions | |||
10 | Mar 25-29 | Spring Break | |||
11 | Mon Apr 1 | L16: GPUs PPTX PDF | Ch. 4.4-4.9 | Ch. 4.4-4.9 | |
Mon Apr 1 | CS252 Readings Discussion |
"Combining
Branch Predictors", McFarling, DEC WRL Technical Note TN-36,
1993 "Dynamic Branch Prediction with Perceptrons", Jimenez, Lin, HPCA 2001 " A case for (partially) TAgged GEometric history length branch prediction , Seznec, Michaud, Journal of Instruction Level Parallelism (JILP), 2006 |
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Wed Apr 3 |
L17: Vectors II
PPTX
PDF
Last year's slides: PPTX PDF *Older vector spec description for Lab 4 only* |
Ch. 4.1-4.3 (App. G) | Ch. 4.1-4.3 (App. G) | ||
Fri Apr 5 | CS152 Section 9: Lab 4 Overview |
PS 4 due Lab 4 RVV 0.4 Spec: Ch 18 |
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12 |
Mon Apr 8 Class cancelled |
Lab 3 due | |||
Mon Apr 8 Section cancelled |
CS252 Readings Discussion |
"The CRAY-1 Computer System", Russel, CACM 1978 "Very Long Instruction Word Architectures and the ELI-512", Fisher, ISCA 1983 "A VLIW Architecture for a Trace Scheduling Compiler", Colwell et al., IEEE Trans. Computers, 1988 |
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Wed Apr 10 | L18: Cache Coherence PPTX PDF | Ch. 5.1-5.4 | Ch. 5.1-5.4 | ||
Fri Apr 12 | CS152 Section 10: Midterm 2 Review Solutions | PS 4 Solutions | |||
13 | Mon Apr 15 | L19: Synchronization and Memory Consistency Models PPTX PDF | Ch. 5.1, 5.5-5.6 | Ch. 5.1, 5.5-5.6 | |
Mon Apr 15 | CS252 Project Checkpoint | Project update | |||
Wed Apr 17 | Midterm 2: L10-17 Solutions | Ch. 5.4 |
PS 5
(PDF,
DOC) Handout 6 Handout 7 |
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Fri Apr 19 | CS152 Section 11: Lab 5 Overview | Lab 5 | |||
14 | Mon Apr 22 | L20: Domain-Specific Architectures and the Google TPU, (Guest lecturer: Prof. David Patterson) PPTX PDF | Ch. 6 | Ch. 6 | Lab 4 due |
Mon Apr 22 | CS252 Readings Discussion |
"The Tera
Computer System", Alverson et al, ICS 1990 "Shared Memory Consistency Models: A Tutorial", Adve, Gharachorloo, DEC WRL TR, 1995 "The SGI Origin: a ccNUMA highly scalable server", Laudon, Lenoski, ISCA 1997 |
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Wed Apr 24 | L21: Virtual Machines (Guest Lecturer: Dr. Lisa Wu) PDF | Ch. 5.2-5.3 | Ch. 5.2-5.3 | ||
Fri Apr 26 | CS152 Section 12: Multiprocessor Review | ||||
15 | Mon Apr 29 | L22: Synchronization Primitives PPTX PDF |
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Mon Apr 29 | CS252 Project Checkpoint | Project update | |||
Wed May 1 | L23: I/O and Warehouse-Scale Computing PPTX PDF | Ch. 7 | PS 5 due | ||
Fri May 3 |
CS152 Section 13:
Final Review Part 1 Solutions |
Lab 5 due
PS 5 Solutions |
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16 | Mon May 6 | No lecture - RRR Week | |||
Wed May 8 | No lecture - RRR Week | ||||
Wed May 8 | CS 252 Final Project Presentations (511 Soda, 2:30pm-5:00pm) | ||||
Friday May 10 | No section - RRR Week | ||||
17 | Tue May 14 | CS 152 Final Exam, 8:00-11:00am, 306 Soda (Solutions) | |||
Fri May 17 | CS 252 Final Project Papers due |
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