Introduction to Digital Design and Integrated Circuits
Letures, Labs, Office Hours
Lectures | Tue, Thu | 5:00 pm - 6:30 pm | 306 Soda | |
Discussion | Fri | 11:00 am - 12:00 pm | 106 Moffitt Library | Arya Reais-Parsi |
ASIC Lab | Wed | 5:00 pm - 8:00 pm | 125 Cory | Taehwan Kim |
FPGA Labs | Wed, Thu | 2:00 pm - 5:00 pm | 125 Cory | Arya Reais-Parsi |
Office Hours | Mon | 1:00 pm - 3:00 pm | 329 Soda | Nicholas Weaver |
Tue, Thu | 2:30 pm - 3:30 pm | 631 Soda | John Wawrzynek | |
Fri | 9:00 am - 11:00 am | 125 Cory | Arya Reais-Parsi | |
Thu | 9:00 am - 10:00 am | 557 Cory | Taehwan Kim |
Discussions, Homework
- Ask questions on our Piazza forum.
- Homeworks will be posted as links in the outline below and announced on Piazza. Please submit completed homework via Gradescope. See Piazza for the entry code.
Course Outline
Week | Date | Lecture Topic | Discussion | ASIC Lab | FPGA Lab | Homework |
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1 | 1/16 Tue | Class Org & Intro to Course Content (slides) | ||||
1/18 Thu | Overview of Design Alternatives & Flows (slides) | Hw 1 Solution |
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2 | 1/23 Tue | HDLs and Verilog Introduction (slides) | Slides | Lab 1 (Getting Around the Compute Environment) (handout) | Lab 1 (Setup Accounts, Verilog Intro, FPGA Basics) (handout) | |
1/25 Thu | Verilog 2, Sequential Elements and Timing (slides) | Hw 2 Solution |
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3 | 1/30 Tue | Combinational Logic (slides) | Slides | Lab 2 (Verilog Simulation) (handout)(DVE manual)(VCS manual) | Lab 2 (FPGA Toolchain, FPGA Mapping, Tone Gen) (handout) Verilog Primer Slides |
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2/1 Thu | FSMs, Logic Synthesis (slides) | Hw 3 Solution |
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4 | 2/6 Tue | Advanced Verilog (slides) | Slides | Lab 3 (Logic Synthesis) (handout) | Lab 3 (Simulation, ROM-based music playback) (handout) | |
2/8 Thu | CMOS circuits (slides) | Hw 4 Solution |
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5 | 2/13 Tue | Transistor Sizing (slides) | Lab 4 (Floorplanning, Placement and Power Routing) (handout) | Lab 4 (Synchronization, Debouncer, Resets, FSM) (handout) | ||
2/15 Thu | Midterm 1 (in class with extra time) (F14 Midterm)(F15 Midterm) - some solutions | |||||
6 | 2/20 Tue | Circuit Timing (slides) LE supplement |
Lab 5 (CTS and Routing) (handout) | Lab 5 (Serial I/O, building UART transmitter) (handout) | ||
2/22 Thu | Energy and Power (slides) | Hw 5 Solution |
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7 | 2/27 Tue | Wires (slides) | Slides | Lab 6 (Power and Timing Verification) (handout) | Lab 6 (UART, I2S) (handout) | |
3/1 Thu | MIPS/RISC-V CPU (slides) | Hw 6 Solution |
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8 | 3/6 Tue | Accelerators and Interfacing (slides) | Slides | Lab 7 (SRAM Integration (handout)) | Lab 7 (FIFOs, Clock Crossing, and UART Piano) (handout) | |
3/8 Thu | Parallelism (slides) | Hw 7 Solution |
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9 | 3/13 Tue | List Processor Example (slides) | Slides | Project Released (checkpoint 1) | Project Released | |
3/15 Thu | Latches, FFs, SRAM, DRAM, flash (slides) | Hw 8 Solution |
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10 | 3/20 Tue | Memory blocks (slides) | Project Checkpoint 1 (checkpoint 2) | Project Checkpoint 1 | ||
3/22 Thu | Midterm 2 (in class with extra time) (Review notes) | |||||
11 | 3/27 Tue | No lecture | ||||
3/29 Thu | No lecture | |||||
12 | 4/3 Tue | Caches (slides) | Slides | Project Checkpoint 2 (checkpoint 3) | Project Checkpoint 2 | |
4/5 Thu | Adders (slides) | Hw 9 Solution |
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13 | 4/10 Tue | Multipliers (slides) | Slides | Project Checkpoint 3 (checkpoint 4) | ||
4/12 Thu | More Multipliers, Counters, LFSRs, Shifters (slides) | Hw 10 Solution |
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14 | 4/17 Tue | Design Example (Kestrel) (slides) | Slides | Project Checkpoint 3 | ||
4/19 Thu | Cryptography (slides) | Hw 11 Solution |
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15 | 4/24 Tue | Clock and Power Distribution (slides) | Project Checkpoint 4 | |||
4/26 Thu | Wrap-up (slides) | |||||
RRR Week | Review Notes; past final: 150-S09, solutions; past midterm: F17-1, F17-2 | Project Interview | Project Checkpoint 4, Interview | |||
Exam Week | 5/11 Fri | Final Exam (11:30 am - 2:30 pm) | Project Report Due (5 p.m. 5/9/18) | Project Report Due (5 p.m. 5/9/18) |
Staff
John Wawrzynek | johnw at berkeley dot edu | |
Nicholas Weaver | nweaver at icsi dot berkeley dot edu | |
Taehwan Kim | taehwan at berkeley dot edu | |
Arya Reais-Parsi | aryap at berkeley dot edu |