| EECS150 Components and Design Techniques for Digital Systems | |
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EECS150 Fall 2008 Calendar |
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| Calendar [8/24/2008-12/20/2008] | ||||
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| Week | Date | Lecture | Homework | Lab |
| 1 | Tue 8/26 | No Lecture | HW #1: [PDF] (Due Fri, Aug 29 @ 14:10) Solution: [PDF] Quiz |
Lec #1: EECS150 Intro & CAD Tools: [PDF] [PPT] |
| Thr 8/28 | Lec #1: Course Introduction & Glue Logic Reading #1: CLD2: section 1.3, figure 1.27, skim all of chapter 1 |
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| 2 | Mon 9/1 | Academic and Administrative Holiday | ||
| Tue 9/2 | Lec #2: Clocks, Timing, Registers, and Flip Flops Reading #2: CLD2: sections 2.1-2.4, 6.1, 9.4.4 |
HW #2: [PDF] (Due Fri, Sep 5 @ 14:10) Solution: [PDF] Quiz |
Lab #1: EECS150 Intro & CAD Tools: [ZIP] [PDF] Lec #2: Designing with Verilog: [PDF] [PPT] |
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| Thr 9/4 | Lec #3: FPGAs; Verilog I Week 2 Recap |
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| 3 | Tue 9/9 | Lec #4: Implementing a Design using Verilog Reading #3: CLD2: 7.1, 7.2 (skip the section on Karnaugh maps): [PDF] [PPT] Finite State Machines in Verilog |
HW #3: [PDF] (Due Fri, Sep 12 @ 14:10) Solution: [PDF] Quiz |
Lab #2: Designing with Verilog: [ZIP] [PDF] Lec #3: Verilog Synthesis & FSMs: [PDF] [PPT] |
| Thr 9/11 | Lec #5: Finite State Machines: [PDF] [PPT] Week 3 Recap |
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| 4 | Tue 9/16 | Lec #6: Karnaugh Maps Reading #4: CLD2: 2.4-2.7, 3.1-3.4 |
HW #4: [PDF] (Due Fri, Sep 19 @ 14:10) Solution: [PDF] Quiz |
Lab #3: Verilog Synthesis & FSMs: [ZIP] [PDF] Lec #4: Debugging & Verification: [PDF] [PPT] [PPSX] |
| Thr 9/18 | Lec #7: Using Karnaugh Maps to simplify FSMs Week 4 Recap |
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| 5 | Tue 9/23 | Lec #8: Hazards; FSM Design; Moore & Mealy Reading #5: CLD2: 6.3, 7.3 |
HW #5: [DOC] (Due Fri, Sep 26 @ 14:10) Solution: [PDF] Quiz |
Lab #4: Debugging & Verification: [ZIP] [PDF] Lec #5: Logic Analysis: [PDF] [PPT] [PPSX] |
| Thr 9/25 | Lec #9: Midterm Review; Implementation Technologies Week 5 Recap |
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| 6 | Tue 9/30 | Midterm I Score Distribution Solutions |
HW #6: [PDF] (Due Fri, Oct 3 @ 14:10) Solution: [PDF] Quiz |
Lab #5: Logic Analysis: [ZIP] [PDF] Lec #6: Network Audio: [PDF] [PPT] |
| Tue 9/30 | Midterm I (2:10pm, 125 Cory) | |||
| Thr 10/2 | Implementation Technologies |
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| 7 | Tue 10/7 | Lec #12: PLAs, PALs and FPGAs Reading #6: CLD2: 4.1 - 4.4 (pay special attention to PLAs and PALs) |
HW #7: [PDF] (Due Fri, Oct 10 @ 14:10) Solution: [PDF] Quiz |
Lab #6: Network Audio: [ZIP] [PDF] Solution: [BIT] Lec #7: Checkpoint #1: Video Encoder & Project Introduction: [PDF] [PPT] |
| Thr 10/9 | Lec #13: FIFOs, The Project and State Minimization |
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| 8 | Tue 10/14 | Lec #14: Guest Lecture Reading #7: CLD2 8.1-8.3: [PDF] [PPT] |
HW #8: [PDF] (Due Fri, Oct 17 @ 14:10) Solution: [PDF] Quiz |
Checkpoint #1: Video Encoder: [ZIP] [PDF] Lec #8: Checkpoint #2: SDRAM Controller: Simulation: [PDF] [PPT] |
| Thr 10/16 | Lec #15: |
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| 9 | Tue 10/21 | Lec #16: RAM, including DRAM, SRAM, and SDRAM Reading #8: CLD2 10.4: RAM FIFO Chain Exercise |
HW #9: [PDF] (Due Fri, Oct 24 @ 14:10) Solution: [PDF] Quiz |
Checkpoint #1: Due & Checkpoint #2: SDRAM Controller: Simulation: [ZIP] [PDF] Lec #9: Checkpoint #3: SDRAM Controller: Arbiter & Hardware Verification: [PDF] [PPT] |
| Thr 10/23 | Lec #17: DRAM timing and Thermal Considerations |
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| 10 | Tue 10/28 | Lec #18: Addition and Subtraction Reading #9: CLD2 5.5 - 5.8 ALUs, Appendix A4 |
HW #10: [PDF] (Due Fri, Oct 31 @ 14:10) Solution: [PDF] Quiz |
Checkpoint #2: Due & Checkpoint #3: SDRAM Controller: Arbiter & Hardware Verification: [ZIP] [PDF] Lec #10: Checkpoint #4: Waveform Viewer: [PDF] [PPT] |
| Thr 10/30 | Lec #19: ALUs |
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| 11 | Tue 11/4 | Lec #20: Midterm II Score Distribution Solutions |
HW #11: [PDF] (Due Fri, Nov 7 @ 14:10) Solution: [PDF] Quiz |
Checkpoint #3: Due & Checkpoint #4: Waveform Viewer: [ZIP] [PDF] Lec #11: Checkpoint #5: Audio Input: [PDF] [PPT] |
| Tue 11/4 | Midterm II (2:10pm, 125 Cory) | |||
| Thr 11/6 | Lec #21: |
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| 12 | Tue 11/11 | No Lecture | HW #12: [PDF] (Due Fri, Nov 14 @ 14:10) Solution: [PDF] Quiz |
Checkpoint #4: Due & Checkpoint #5: Audio Input: [ZIP] [PDF] Lec #12: Extra Credit: [PDF] [PPT] |
| Tue 11/11 | Academic and Administrative Holiday | |||
| Thr 11/13 | Lec #22: Floating Point, Multiplication and Division |
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| 13 | Tue 11/18 | Lec #23: Guest Lecture: Digital Interface Design by Greg Gibeling: [PDF] [PPT] |
HW #13: [PDF] (Due Fri, Nov 21 @ 14:10) Solution: [PDF] Quiz |
Checkpoint #5++: Extra Credit Lec #13: Project Report: [PDF] [PPT] |
| Thr 11/20 | Lec #24: Serial Interfaces (I) |
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| 14 | Tue 11/25 | Lec #25: Serial Interfaces (II) |
Checkpoint #5: Due No Lab Lecture |
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| Thr 11/27 | No Lecture | |||
| Thr 11/27 | Thanksgiving | |||
| Fri 11/28 | Thanksgiving | |||
| 15 | Tue 12/2 | Lec #26: Microprocessors (I) |
Lab: Final Check-off Lab Lecture: Project Competition & Project Report Due |
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| Thr 12/4 | Lec #27: Microprocessors (II) |
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| 16 | Tue 12/9 | Lec #28: Conclusion |
HW #14: [PDF] (Due Fri, Dec 12 @ 14:10) Solution: [PDF] Quiz |
No Lab Lecture |
| Wed 12/10 | Last Day of Instruction | |||
| Thr 12/11 | No Lecture | |||
| 17 | Tue 12/16 | No Lecture | No Lab Lecture | |
| Thr 12/18 | No Lecture | |||
| Thr 12/18 | Final (5pm, 125 Cory) | |||
| Last Updated: 01/18/2009 by | |
| Chris Fletcher |
