Velocity Vectors
Left:
- shown as upward bars on computer screen ¬
Right:
- shown as downwards bars ®
Towards:
- get bars both left and right, going "outwards" ¬
®
Away:
- get bars both left and right, going "inwards" ®
¬
Debugging
(listed in checkpoint 1)
Logic:
- draw a state diagram
- truth table
- label important parts of your schematic (easier to read later)
Simulate using ViewSim:
- make sure your FSM works before trying to debug it on the Xilinx
- name internal outputs to check intermediate logic works correctly
Download to Xilinx and test:
- display important signals on the LEDs
- output important signals to pins to check them with oscilloscope and logic probe
Serial Transmitter
Purpose:
- send information to the computer
- 115kHz, one way signal
- used to send frames
Checkpoint 1:
- UART: serial transmitter
- send bytes to the computer from SW5 dip switches (hex displayed on CR3 and CR4)
Maxim 233 Chip
Maxim 233 chip:
- used to convert TTL voltages (0V, 5V)
- Maxim chip outputs are +10V and -10V (output is inverted)
- make sure these voltages don’t touch other parts of the Xilinx or logic probe
- MAKE SURE YOU HAVE A MAXIM CHIP
Wrap ID:
- Notch (half-circle) at top of chip, is top of wrap ID
UART Serial Transmitter
Convert 16MHz clock to 115kHz
- need to send data down serial at 115kHz
- similar to Problem Set 7, Question 3
Serial data sent down serial line:
- send parallel 8 bit data out a bit at a time
- must send out with LSB first MSB last
- can do this with shift registers, shift out LSB first, all the way through to MSB
Sending Serial Data
Serial transmission protocol:
- to start sending data send a 0
- send 8 bits
- when finished, send a 1
Þ
FSM to handle protocol, and start sending when spare button pressed
9 pin Serial connector:
- pin 2 is serial in (from T1out or T2out on Maxim chip)
- pin 5 is ground
Pin numbers are not stated in lab handout so write these down!
Prelab
Prelab:
- 20%: must have Maxim wrapped, use a Wrap ID
- 25%: simulate sending a byte at 115kHz
IMPORTANT NOTE:
- six chips on Xilinx Þ
shortage of space
- route wires tidily
Debugging Checkpoint 1
Need to send data to serial at 115kHz
- verify that you have can get a 115kHz signal from the 16MHz clock
- output 115kHz clock to a pin on the Xilinx
To output signals to pins and show on LEDs:
- look at lab5.1 TA schematic (in CS150 library)
- the output data goes to LED pins
- send data to other pins the same way
It is useful when debugging to output the state to LEDs.
Use oscilloscope to observe serial signal:
- edge trigger on rising edge of serial signal
- use "Single" storage mode (ensure the trigger mode is normal)
Project
Meeting with TA next week (5% of project):
- state diagram and block diagram of logic
- show control signals
- make sure you have all necessary states
These should be neatly presented to hand in to your TA (keep a copy for yourself).
Outline the key points of your design
- make a note of where you need help
Be on time, or you get zero.
Announcement:
in a group of 3?
don’t have a lab partner?
Please come up to the front after lecture.