Table of ContentsOutline Feedback in Digital Circuits Latches and Flip-Flops The Set-Reset (SR, RS) Latch The S'-R' Latch S-R Latch With Enable Data (D) Latch Review Setup and Hold Times The Set-Reset (SR, RS) Latch S-R Latch With NANDs S-R Latch With NANDs The Master-Slave J/K Flip-Flop J/K Flip-Flop Conversions J-K Latch Review Toggle (T) Flip-Flop Latch & Flip-Flop Characteristic Equations Input/Output Behavior of Latches and Flip-Flops Standard Latch & Flip-Flop Conventions |
Author: Microsoft Corporation
Email: rnewton@ic.eecs.berkeley.edu Home Page: http://www-inst.eecs.Berkeley.edu/~cs150 |