Computer Science 150 Homework Assignment 6
Spring 1998

Due: Tuesday, March 31st 5:00 pm (after break)
The numbers in brackets [ ] denote the relative marks assigned for each question.


(1) [15pts](a) Convert the BCD coded number below to equivalent decimal form:

1000011101100010.01100101 (b) Convert (271.A)16 to (i) Base 2 and (ii) Base 8 equivalents.

(c) Design a circuit for converting a 4-bit Gray code into its binary equivalent. You may use AND, OR, XOR, or inverter gates only. Use as few gates as possible.

(d) Implement a 1-bit full adder using a minimum number of 4-input, two control-line multiplexers and inverters only. An inverter counts as 1/5th (20%) of a MUX. Assume complements are not available.

(2) [10pts] Describe the function and characteristics of the counter circuit shown below:

(3) [20pts] A JN flip-flop has two inputs, J and N. Input J behaves like the J input of a JK flip-flop, and N behaves like the complement of the K input of a JK flip flop (i.e. ).

(i) Obtain the characteristic table of the JN flip-flop

(ii) Show that by connecting the two J and N inputs together, one obtains a D-type flip-flop.

 

(4) [55pts] You are to design a bus arbiter that operates as follows. When inputs IA IB = 0 0 the circuit either goes into the idle state (outputs OA OB = 0 0, disabling both Bus A and Bus B buffers), or remains in the idle state. When inputs IA IB change to 1 0 or 1 1 the circuit goes into State A (outputs OA OB = 1 0 enabling the Bus A buffers and disabling the Bus B buffers.) When inputs IA IB change to 0 1 while in the idle state, the circuit goes to State B (outputs OA OB = 0 1 disabling Bus A buffers and enabling Bus B buffers.) To go from State A to State B requires input IA IB = 01, and to go from State B to State A requires inputs IA IB = 1 0.
(a) Construct a State Transition Graph for the bus arbiter in Moore form.

(b) Derive a State Transition Table from your graph, also in Moore form.

(c) If the idle state is encoded as Y1 Y2 = 0 0, State A is encoded as Y1 Y2 = 0 1 and State B as Y1 Y2 = 1 1, derive the Karnaugh maps for the next-state and output functions.

(d) If the machine is to be implemented using JK flip-flops, obtain the Karnaugh maps for the JK flip-flop excitation inputs. Write the excitation input and external output equations for the design.