Asynchronous Circuits(Feedback Sequential Circuits)
? Clocked Synchronous Circuits:
???Change of state only occurs in response to a clock pulse
???When this change of state requires that a number of flip-flops change their values, they do so simultaneously because they are synchronized by the common clock pulse.
???Input changes are assumed to occur in between clock pulses and outputs may be read during or immediately before a clock pulse.
? Conditions where this model is too restrictive:
???The network has inputs which may change at any time and cannot be synchronized by a clock.
??Signal travel time down wires is significant and wire lengths in the circuit cannot be controlled
??We want the network to operate as fast as possible
???The power dissipation overhead of clocking signals that do not change is unacceptable (we need "event-driven" circuits).