Outline

4/28/98


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Table of Contents

Outline

Race Conditions and Cycles

Race Conditions

Example 3: Asynchronous Analysis

Race-Free State Assignment

Race-Free State Assignment

Race-Free State Assignment

Race-Free State Assignment

Shared-Row Assignments

Shared-Row Assignment

Shared-Row Assignment

Error Detection & Correction

Hamming Codes

Hamming Codes

Hamming Codes

Hamming Codes

Hamming Codes

NMM: Combinational Implementation

Pipelined Implementation

Bandwidth and Latency

Simple Dataflow Description: B^2 - 4AC

Scheduling of Functional Units

Allocation of Functional Units: Data Dependencies

Allocation of Functional Units: Time-Space Tradeoffs

Allocation of Functional Units: Sharing of Signal Links

Allocation of Functional Units: More Efficient Use of Links

Design Using Multiplexers

Binary Decision Diagrams

Implementation of Logic Using Switches

Binary Decision Diagrams

Use of BDDs for Verification

Use of BDDs for Verification

Use of BDDs for Verification

Combinational Verification Using Canonical Form

Connectivity Verification

Connectivity Verification

Author: Richard Newton

Email: rnewton@ic.eecs.berkeley.edu

Home Page: http://www-inst.eecs.berkeley.edu/~cs150