Checkpoint 3 - Data Path

For this checkpoint, you will need to show the saving of video data to the SRAM.

For the meeting with your TA, you will need show your data path schematics in ViewDraw. This means all your control signals, data bus, symbols for FSMs, and any tristate buffers. You can use portions of previous lab's schematics to make up your I/O section (IOPADS, IBUFs, etc.).
This week's checkpoint is showing the saving of video data to the SRAM. You will show the control signals of the SRAM and A/D and the SYNCH signals on the oscilloscope. You will have to convince the TA that the correct data is being written to the SRAM.
Your Video FSM should take COMP SYNC and VSYNC as inputs and enable the A/D output and SRAM write enable signals and increment the address of the SRAM at the correct time for saving the pixels to the SRAM.
You do not need to send the data from the SRAM to the PC for this checkpoint, but you may want to work on it to get ahead. Mode 2 may be a little difficult, so you will want to get ahead if you want the early project checkoff.