Resources and Links

Links to References:

  • Remote Desktop Connection Information [pdf]
  • Sample Online Notebook: [html]
  • Lab Report Format: [html]
  • Documents:
    • Paper on testing by Douglas Clark: [ps,pdf]
    • Review papers on the MultiFlow VLIW architecture and its compiler.
      (local only) [pdf, pdf]
    • Alternative Implementation of Two Level Adaptive Branch Prediction,
      by Tse-Yu Yeh and Yale Patt [pdf]
    • A 50-GB/s IP Router,
      by Craig Partridge et al [pdf]
  • SPIM Documentation [ps, pdf]
  • MIPS Instruction Set Reference [pdf]
  • Information about the Calinx boards that we will be using: [html]
    • Xilinx VIRTEX E FPGA Databook [pdf]
    • 128 Mb SDRAM technical manual [pdf]
    • 256 Mb SDRAM technical manual [pdf]
  • CVS Information:
    • Michael Chu's quick CVS tutorial [txt]
    • John Gibson's CVS on Windows tutorial [html]
  • Verilog information:
    • IEEE Standard Verilog Hardware Description Language (Berkeley only) [pdf]
    • Verilog Tutorial (from Bucknell University) [html]
    • Discussion of blocking and non-blocking assignments. [pdf]
  • Modeling Delays in Verilog [pdf]
  • Xilinx Tool information (Berkeley only):
    • Xilinx manuals on line [pdf]
    • ModelSim manual [pdf]
    • Synplify Reference Manual [pdf]
    • Xilinx Tutorial #1 (Tool Flow) [doc]
    • Xilinx Tutorial #2 (Global Time Constraints) [doc]
    • Xilinx Tutorial #3 (XST Synthesis) [doc]
    • Xilinx Tutorial #4 (Coregen) [doc]
    • Xilinx Tutorial #5 (Floorplanner) [doc]
    • Xilinx Tutorial #7 (HDL Bencher) [doc]
    • Xilinx Tutorial #8 (Pong) [doc]
    • Xilinx Tutorial #9 (StateCAD) [doc]
    • Xilinx Tutorial #10 (Detail Design Description) [doc]
  • Xilinx support websites [support.xilinx.com]
  • MSU's Xilinx's support page [xup.msu.edu]
  • Tutorial For the Xilinx Tool Flow (From CS152 TA alumni): [pdf, doc]
  • Homeworks for Fall 05: [hw1.pdf, hw2.pdf]