Papers for CS250: VLSI Systems Design

Fall 2009

Tuesday, November 24:

Xcell journal - Virtex-5 Special Edition. full journal extracted journal
Read the following articles:
8-11 Introducing the Virtex-5 FPGA Family
16-18 Achieve Higher Performance with Virtex-5 FPGAs
31-32 Clock Management in Virtex-5 Devices
33-36 Reduce Power with Virtex-5 FPGAs
70-72 Memories are Made of This
Measuring the Gap Between FPGAs and ASICs. Ian Kuon and Jonathan Rose. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) , Vol. 26, No. 2, pp 203-215, Feb. 2007, paper
Thursday, November 19:

Restrictive Design Rules and Their Impact on 22 nm Design and Physical Verification. David Abercrombie, Praveen Elakkumanan, and Lars Liebmann. article
iPhone 3GS Hardware Exposed & Analyzed. Anand Lal Shimpi. article
Tuesday, November 17:

Implementing the Scale Vector-Thread Processor. Ronny Krashinsky, Christopher Batten, and Krste Asanovic. ACM Transactions on Design Automation of Electronic Systems (TODAES), 13(3), 41:1-41:24, July 2008. paper
The Vector-Thread Architecture. Ronny Krashinsky, Christopher Batten, Mark Hampton, Steven Gerding, Brian Pharris, Jared Casper, and Krste Asanovic. Proceedings of the 31th International Symposium on Computer Architecture (ISCA-31) 2004. paper
Thursday, November 5:

Incorporating Flexibility in Anton, a Specialized Machine for Molecular Dynamics Simulation. Jeffrey S. Kuskin, Cliff Young, J.P. Grossman, Brannon Batson, Martin M. Deneroff, Ron O. Dror, and David E. Shaw. Proceedings of the 14th International Symposium on High-Performance Computer Architecture (HPCA-14) 2008. paper
(optional) Anton, a Special-Purpose Machine for Molecular Dynamics Simulation. David E. Shaw, Martin M. Deneroff, Ron O. Dror, Jeffrey S. Kuskin, Richard H. Larson, John K. Salmon, Cliff Young, Brannon Batson, Kevin J. Bowers, Jack C. Chao, Michael P. Eastwood, Joseph Gagliardo, J.P. Grossman, C. Richard Ho, Douglas J. Ierardi, Istvan Kolossvary, John L. Klepeis, Timothy Layman, Christine McLeavey, Mark A. Moraes, Rolf Mueller, Edward C. Priest, Yibing Shan, Jochen Spengler, Michael Theobald, Brian Towles, and Stanley C. Wang. Communications of the ACM 2008. paper
(optional) High-Throughput Pairwise Point Interactions in Anton, a Specialized Machine for Molecular Dynamics Simulation. Richard H. Larson, John K. Salmon, Ron O. Dror, Martin M. Deneroff, Cliff Young, J.P. Grossman, Yibing Shan, John L. Klepeis, and David E. Shaw. Proceedings of the 14th International Symposium on High-Performance Computer Architecture (HPCA-14) 2008. paper
Tuesday, November 3:

Fault-Tolerant Design of the IBM Power6 Microprocessor. Kevin Reick, Pia N. Sanda, Scott Swaney, Jeffrey W. Kellington, Michael Mack, Michael Floyd, and Daniel Henderson. IEEE Micro 2008. paper
Design and Implementation of the POWER6 Microprocessor. Benjamin Stolt, Yonatan Mittlefehldt, Sanjay Dubey, Gaurav Mittal, Mike Lee, Joshua Friedrich, and Eric Fluhr. IEEE Journal of Solid-State Circuits, vol. 43, no. 1 (JSSC) 2008. paper
IBM Power7 architecture illustrates some issues for the rest of us. Ron Wilson. EDN 8/27/2009. paper
Thursday, October 22:

Energy-Delay Optimization of 64-Bit Carry-Lookahead Adders With a 240 ps 90 nm CMOS Design Example. Radu Zlatanovici, Sean Kao, and Borivoje Nikolic. IEEE Journal of Solid-State Circuits, vol. 44, no. 2 (JSSC) 2009. paper
Tuesday, October 20:

Low Power ARM 1136JF-S(tm) Design. George Kuo, and Anand Iyer. Closing the Power Gap Between ASIC & Custom (book). paper
A Sub-2 W Low Power IA Processor for Mobile Internet Devices in 45 nm High-k Metal Gate CMOS. Gianfranco Gerosa, Steve Curtis, Michael D'Addeo, Bo Jiang, Belliappa Kuttanna, Feroze Merchant, Binta Patel, Mohammed H. Taufique, and Haytham Samarchi. IEEE Journal of Solid-State Circuits, vol. 44, no. 1 (JSSC) 2009. paper