Preliminary list.
I will try to grow this over the next several days.
Project proposal presentations start in class on 2/11. We will use the class presentation discussion to help focus (or expand) your proposal. Before then, however, I would like to get a general idea of what you are planning on working on. Please contact me before 2/9 with your preliminary idea for a project. If you are really stuck for an idea, please contact me earlier so we can talk about it. Also, if you have an idea already, but would like to find a partner to help on it, let me know as soon as possible. I will post more information later on what in particular you should cover during your presentation in class.
Below are some sample ideas. It is best if you come up with one of your own that matches your own interests and background.
Application Mapping: The goal of this type of project is to understand the computational density (perhaps versus a traditional processing approach) for a reconfigurable implementation of some particular application. This would involve developing a new algorithm or tailoring an existing algorithm to a reconfigurable device. We have a set of FPGA-based platforms available (this will be discussed in class).
Area-time tradeoff in operators. Mapping data-flow spatial could require lots of chip resources. One way to reduce the required resources while retaining the advantages of a spatial implementation is through serialization of the primitive operators as an alternative to serialization of data-flow. This project could explore this idea in the context of some application kernel. It could start with the design of serial floating-point operators (or operators with a parameterized degree of serialization).
Hardware Assisted Routing and/or Partitioning. FPGA portioning, placement, and routing is currently extremely time consuming and a major hindrance to high-end reconfigurable computing. Preliminary work in using FPGAs to accelerate the placement and routing problem is very promising, but has focused on non-standard architecture targets. This project would extend this work and apply it to standard FPGAs.
“Hardware-Assisted Fast
Routing.” André DeHon, Randy Huang, and John Wawrzynek., Published in
Proceedings of the IEEE Symposium on Field-Programmable, Custom Computing
Machines (FCCM '02, April 22--24, 2002).
“Hardware-Assisted
Simulated Annealing with Application for Fast FPGA Placement.” Michael Wrighton
and André DeHon. In Proceedings of the International Symposium on Field
Programmable Gate Arrays, pages 33--42, February, 2003.
Linpack on the high-end
Reconfigurable Architectures. Linpack is used to evaluate the performance
of supercomputers. Some people believe
that high-end computers build from collections of FPGAs can compete and far
exceed supercomputer cost-performance.
This project would map Linpack to an array of FPGAs, carefully
considering the memory and interconnection
requirements and architecture.
Manufacturing Defect Tolerance. This project would
explore and evaluate techniques for discovery of manufacturing defects in FPGAs
and CAD tool techniques for mapping around defects.