Wk |
Date |
Lecture Topic |
Reading |
Section |
Lab |
Assignment Due
|
1
|
08/29 Th |
Introduction: Trends - WSC to Multicore Computers
(pptx) (pdf)
|
WSC Book: Ch 1, 3, 5.1-5.3
P&H (4th): 1.1-1.3 P&H (5th): 1.1-1.5 |
[No discussions]
|
[No labs]
|
HW1:
Due 09/08/13 @ 23:59:59
(Solution)
|
2
|
09/03 Tu |
Parallelism: Data Parallel MapReduce
(pptx) (pdf) |
WSC Book: Ch 2.4
|
Section 1: MapReduce and WSC (Solutions)
|
Lab 1: Git
Additional Git Notes
|
09/05 Th |
Introduction to C: Basic Language Elements
(pptx) (pdf) |
K&R: 2, 3, 5.1, 5.3, 6.1, 6.2
|
3
|
09/10 Tu |
Introduction to C: Pointers, Arrays, Strings
(pptx) (pdf) |
K&R: 4.4, 4.5, 4.8-4.10, 5.2, 5.4, 5.5, 5.10 |
Section 2: C Programming (Solutions)
|
Lab 2: MapReduce
|
HW2:
(Solutions)
Due 09/15/13 @ 23:59:59
|
09/12 Th |
HW/SW Interface: C to MIPS
(pptx) (pdf) |
P&H (4th): 2.1-2.3, 2.7, 2.8
P&H (5th): 2.1-2.3, 2.7, 2.8 |
4
|
09/17 Tu |
HW/SW Interface: MIPS Instructions, Operands, Strings
(pptx) (pdf) |
P&H (4th): 2.8, 2.13, 2.14
P&H (5th): 2.8, 2.13, 2.14 |
Section 3: Number Representation and MIPS (Solutions)
|
Lab 3: EC2
EC2 Misc Info
|
HW3: (Solutions)
Due 09/22/13 @ 23:59:59
Project 1-1: MapReduce
Due 09/22/13 @ 23:59:59
|
09/19 Th |
HW/SW Interface: Number Representations
(pptx) (pdf) |
P&H (4th): 2.4, 3.5 (pp. 242-250)
P&H (5th): 2.4, 3.5 (pp. 196-202) |
5
|
09/24 Tu |
HW/SW Interface: Machine Instructions, Floats
(pptx) (pdf) |
P&H (4th): 2.12, B.1-B.4
P&H (5th): 2.12, A.1-A.4 |
Section 4: Decoding MIPS and Floats (Solutions)
|
Lab 4: C Practice and Debugging
|
Project 1-2: MapReduce on EC2
Due 09/29/13 @ 23:59:59
|
09/26 Th |
Assembly, Pseudo Instructions, Linking, Compilation, Interpretation
(pptx) (pdf) |
P&H (4th): 2.12
P&H (5th): 2.12 |
6
|
10/01 Tu |
Moore's Law, Components
(pptx) (pdf) |
P&H (4th): 1.4 P&H (5th): 1.6 |
Section 5: Caches (Solutions)
|
Lab 5: MIPS Assembly
|
HW4:
(Solutions)
Due 10/06/13 @ 23:59:59
Project 2-1: MIPS Simulator
Due 10/06/13 @ 23:59:59
|
10/03 Th |
Performance, Quantitative Evaluation, and Memory Hierarchy: Direct Mapped Caches
(pptx) (pdf) |
P&H (4th): 5.1 P&H (5th): 5.1, 5.2 |
7
|
10/08 Tu |
Memory Hierarchy: Writing, AMAT, Multilevel Caches
(pptx) (pdf) |
P&H (4th): 5.2 (pp. 457-470), 5.3 (pp. 474-479)
P&H (5th): 5.3 (pp. 383-395), 5.4 (pp. 398-402) |
Section 6: More Caches and Flynn Taxonomy
(Solutions)
|
Lab 6: More MIPS
|
Project 2-2: MIPS Simulator
Due 10/13/13 @ 23:59:59
|
10/10 Th |
Cache Blocking, and Data Level Parallelism: Flynn Taxonomy, Amdahl's Law
(pptx) (pdf) |
P&H (4th): 1.5, 1.6, 7.1, 7.2
P&H (5th): 1.7, 1.8, 5.4 (pp. 413-417), 6.1, 6.2 |
8
|
10/15 Tu |
Data Level Parallelism: Loop Unrolling, Intel SSE SIMD
(pptx) (pdf) |
P&H (4th): 7.4, 7.7
P&H (5th): 6.6, 6.7 |
Midterm Review
(Solutions)
|
Lab 7: Cache Blocking
|
[Midterm Studying]
|
10/17 Th |
Midterm 6-9 PM in 10 Evans (Logins cs61c-1a thru cs61c-dz),
155 Dwinelle (Logins cs61c-ea thru cs61c-of), 1 Pimentel (Logins cs61c-og thru cs61c-zz)
(Midterm) (Answers/Explanations) |
9
|
10/22 Tu |
Thread Level Parallelism: Cache Coherency, Data Races, Synchronization
(pptx) (pdf) |
P&H (4th): 7.3, 5.8
P&H (5th): 6.5, 5.10 |
Section 8: SIMD & Shared Memory
(Solutions)
|
Lab 8: Data Level Parallelism
|
HW5: (Solutions)
Due 10/27/13 @ 23:59:59
Project 3-1: Image Processing and Optimization
Due 10/27/13 @ 23:59:59
|
10/24 Th |
Thread Level Parallelism: OpenMP
(pptx) (pdf) |
OpenMP Summary Card
P&H (4th): 2.11 P&H (5th): 2.11 |
10
|
10/29 Tu |
Hardware: Transistors/Gates/Flip-flops, Boolean Algebra, Timing
(pptx) (pdf) |
Logic Handout State Handout
P&H (4th): C.2-C.3 (on CD) P&H (5th): B.2-B.3 |
Section 9: Boolean Logic, State, FSM
(Solutions)
|
Lab 9: Thread Level Parallelism
|
Project 3-2: With OpenMP
Due 11/03/13 @ 23:59:59
|
10/31 Th |
Hardware: Timing, FSM, Logisim Demo
(pptx) (pdf) |
Blocks Handout SDS Handout |
11
|
11/05 Tu |
Hardware: Single Cycle CPU Datapath and Control
(pptx) (pdf) |
P&H (4th): 4.1, 4.3, 4.4 P&H (5th): 4.1, 4.3, 4.4 |
Section 10: Clocking and CPU Design
(Solutions)
|
Lab 10: Logisim
|
HW6:
Due 11/10/13 @ 23:59:59 (Solutions)
|
11/07 Th |
Instruction Level Parallelism
(pptx) (pdf) |
P&H (4th): 4.5, 4.6 P&H (5th): 4.5, 4.6 |
12
|
11/12 Tu |
Instruction Level Parallelism
(pptx) (pdf) |
P&H (4th): 4.7, 4.8 P&H (5th): 4.7, 4.8, 4.10 |
Section 11: Pipelining
(Solutions)
|
Lab 11: More Logisim
|
Project 4: Processor Design
Due 11/17/13 @ 23:59:59
|
11/14 Th |
In More Depth: Memory Hierarchy/Set-Associative Caches
(pptx) (pdf) |
P&H (4th): Rest of 5.2, 5.3 P&H (5th): Rest of 5.3, 5.4 |
13
|
11/19 Tu |
In More Depth: Dependability (ECC)
(pptx) (pdf) |
P&H (4th): 6.2, C-65 to C-67 P&H (5th): 5.5, B-65 to B-67 |
Section 12: Set Associative Caches & C Memory Management
(Solutions)
|
Lab 12: C Memory Management
|
Project 5: Image Processing and Optimization Extra Credit
Due 12/01/13 @ 23:59:59
|
11/21 Th |
In More Depth: Dependability (RAID)
(pptx) (pdf)
(slightly modified slide deck from Lecture #23, Tu 11/19) |
K&R: 7.8.5 P&H (4th): 6.9 P&H (5th): 5.11 |
14
|
11/26 Tu |
In More Depth: Virtual Memory
(pptx) (pdf) |
P&H (4th): 5.7
P&H (5th): 5.6 |
[No discussion]
|
[No lab]
|
11/28 Th |
Thanksgiving Holiday |
|
15
|
12/03 Tu |
Virtual Machines/Programming Contest
(pptx) (pdf) |
P&H (4th): 5.4 (pp. 492-499)
P&H (5th): 5.6 |
Section 13: ECC & Virtual Memory
(Solutions)
|
[No lab]
|
[Final Studying]
|
12/05 Th |
Course Retrospective
(pptx) (pdf) |
|
Reading Week
|
|
|
Finals Week
|
12/20 F |
Final Exam: 8-11 AM, Location RSF Fieldhouse
(Final) (Answers) |