Goals

This assignment provides you with more practice inferring cache parameters (this time, for a TLB), and introduces you to logic design.

Reading

Chapter 7 and sections 4.4, B.1, and B.2 in P&H.

Administrative requirements

Submit your solutions online by 11:59pm on Wednesday, March 24. Do this by creating a directory named hw5 that contains a file named solns . From within that directory, type "submit hw5".

This is not a partnership assignment ; hand in your own work, and don't collaborate with anyone else.

Exercise 1 (2 points)

The output of a modified version of the cache.c program from lab 6, run on the nova computer, is available in the file ~cs61c/lib/nova.results . Time values greater than 100ns indicate TLB misses. From the data, determine the size of a page and the size and replacement policy of the TLB, and explain how you derived your answers from the cache.c output.

Exercise 2 (2 points)

Let the six bits of the MIPS instruction op code field be labeled x5 , x4 , x3 , x2 , x1 , and x0 . For example, the j (jump) instruction, whose op code is 02, has x1 = 1 and the other xk = 0 .

Find a Boolean expression whose value is 1 if the xk represent the op code of a load instruction ( lb , lh , lwl , lw , lbu , lhu , lwr ) and whose value is 0 otherwise. The hexadecimal op codes of the load instructions are 20, 21, 22, 23, 24, 25, and 26 (Figure A.19 in P&H unfortunately has them off by 1).

Exercise 3 (2 points)

Design a four-bit shifter. Its inputs will be a four-bit segment to be shifted (named input in the diagram below) and a two-bit quantity of bits to shift it left (named shift in the diagram). The output is the shifted input value.

The C expression 13 << 2 would correspond to input3 = input2 = input0 = 1 and input1 = 0 (since 13 base 10 = 1101 in binary), and shift1 = 1 and shift0 = 0 (since 2 base 10 = 10 in binary). The result is 0100, so output2 = 1 and the other output values are 0.

Your solution should consist of Boolean equations expressing the output values in terms of the input and shift values, along with an explanation of how you derived them.