For this project you will implement a data path which fetches 8-bit instructions from memory and executes them. Details on what components your datapath must have as well as the instructions you must implement can be found below. The project will be due Monday May 9th at 11:59 PM . Any updates and clarifications to the spec can be found here.

Logisim 2

You will be using Logisim 2 for this project. You can run it on the instructional machines by typing java -jar ~cs61c/bin/logisim2.jar and you can download it to your home machine from the Logisim Website. Use java -jar ~cs61c/bin/logisim-v20b10.jar to run the most recent and stable version.

Logisim 2 is very early BETA software. This means a few things for you:

1. Save early, save often, make backups. This software will crash on you. Be prepared for this to happen. In addition, make sure you make fairly frequent backups of your files, as you may hit a bug that corrupts your file.

2. The course staff and the software developer are very interested in getting your feedback and suggestions for the new version and bug reports. Please, if you have thoughts on the software or hit a bug, do us a favor and provide the information to us via the Feedback Form or Bug Report.

3. A lot of the features of the new version are not yet well-documented. The beginnings of a tutorial/user guide are now available from the Logisim developer.

4. As suggestions and bug reports come in during the project we may change to new versions of Logisim. Watch here for software updates.

Components you must have


The PC will be an 8-bit register holding the address of current instruction which is being fetched and executed from the instruction memory.

Register File

You will have a register file which has 2 8-bit wide registers. You should be able to read from the two registers asynchronously and write to a single register synchronously.


You will have separate instruction and data memories (thus prohibitting self-modifying code). The new version of logisim provides a memory module which you can use.The instruction memory is 8 bits wide and addressed with 8 bits (thus 256 instruction memory locations). The data memory is also 8 bits wide but is only addressed with 4 bits (thus there are only 16 data memory locations). We use byte addressing


You will have an ALU which supports ADD, SUBTRACT, BITWISE AND, and BITWISE OR. All these instructions operate on 8-bit wide data. We will provide you with an 8-bit adder/subtracter.

Instructions you must implement

All instructions have a 3-bit opcode.
If this opcode is 0, the the instruction is an R-type instruction and is encoded as follows:
7 6 5 4 3 2 1 0
op rd rs1 rs2 func
op = opcode
rd = destination register
rs1 = source register 1
rs2 = source register 2
func = function code

If this opcode is anything besides 0 then it is an I-type instruction and is encoded as follows:
7 6 5 4 3 2 1 0
op rd imm
op = opcode
rd = destination register
imm = immediate

R-type instructions

You must implement the following R-type instructions:
Instruction Opcode Function code meaning
add $rd,$rs1,$rs2 0 0 R[rd] = R[rs1] + R[rs2]; PC = PC + 1
sub $rd,$rs1,$rs2 0 1 R[rd] = R[rs1] - R[rs2]; PC = PC + 1
or $rd,$rs1,$rs2 0 2 R[rd] = R[rs1] | R[rs2]; PC = PC + 1
and $rd,$rs1,$rs2 0 3 R[rd] = R[rs1] & R[rs2]; PC = PC + 1

I-type instructions

You must implement the following I-type instructions: .
Instruction Opcode Meaning
jeq imm 1 if R[0] == R[1] then PC = {upper_four_bits(PC), imm} else PC = PC + 1
j imm 2 PC = {upper_four_bits(PC), imm}
load $rd,imm 3 R[rd] = MEM[imm]; PC = PC + 1
store $rd,imm 4 MEM[imm] = R[rd]; PC = PC + 1
lui $rd,imm 5 R[rd] = {imm, 0000}; PC = PC + 1
ori $rd,imm 6 R[rd] = R[rd] | zero_extended(imm); PC = PC + 1
halt 7 nothing happens; PC = PC

Testing your circuit

Write a program which computes the value of sum(n) = 1 + 2 + 3 + ... + n. It should read the value n from MEM[0] and store the result in MEM[f].