Updated: | Sun. 2010.07.18 3:20pm |
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Due: | 2010.07.21 @ 11:59pm |

TA: | Tom Magrino <cs61c-tc@imail.eecs.berkeley.edu> |

Credit: | This homework is an adapted version of a homework created by past TA Bing Xia. |

This assignment will check your understanding of synchronous digital systems, state elements, and combinational logic.

Consider the circuit of Flip-Flops (FF) shown here. Assume that input X alternates between 1 and 0, changing 25 ns after the rising edge of the clock and initializing as 0. Assume one clock cycle is 100 ns. Draw the detailed wave for the clock signal, input X, and the signals at points A, B, C, and D in the circuit for the first 6 clock cycles. Assume that the clk-to-q delay is 7ns. Show undetermined signals as shaded bars for the duration that is undetermined. You may optionally show clk-to-q as dotted lines if it helps you.

Consider the accumulator discussed in the readings and presented in class. Given the following: The adder propagation delay is 2ns, the register setup time is 1 ns, the register clk-to-q is 1ns, and the clock frequency is 400MHz. Will the accumulator function correctly? If not, what would you suggest changing to fix the problem?

Derive the truth-table for the CL circuit shown here. (Remember, you do this by applying all possible input combinations, one at a time). What is the most simplified version of the expression that this circuit/truth-table generates?

Write the most simplified Boolean expression for the function
represented by the truth-table below. SHOW ALL YOUR WORK! The solution is an OR of two expressions.

(Note: If you are up for a little extra reading, check out K-maps)

ABC | Y |
---|---|

000 | 1 |

001 | 0 |

010 | 1 |

011 | 1 |

100 | 0 |

101 | 0 |

110 | 1 |

111 | 1 |

Redraw the complete UNSIMPLIFIED circuit diagram from problem 3 using
only NAND gates. You must show all the gates used (that is to say, you
can not include larger structures in your diagram). Show all your work
to derive this structure. **This question must be done using only
2 input NAND gates. You will not get full credit for this question if
you use > 2 input NAND gates.**

Create a directory named 'hw6' containing a README and any additional
files needed for your submission. The README should say where to look for each question's solution.
While in that directory, run 'submit hw6'. If you included an image, make sure to say "yes" when the submit
script prompts you about it. **PLEASE ONLY SUBMIT IMAGES IN THE FOLLOWING
FORMATS: GIF, JPG, and PDF.**