CS61C $ummer 2017 Lab 13: Virtual AKA FAKE Memory. It's not real.


The purpose of this lab is to acquaint you with the structure and workings of the virtual memory system. You will work with two different simulators to develop this understanding.

The Lab Files

...There are none! LOL GOTCHA


For this lab you will be mostly using the virtual memory simulation features of a random program that someone hacked up called "Camera": a cache and virtual memory simulator. You may also find the cache simulations interesting, however we won't be working with those here.

Unfortunately, Camera is known to have issues when trying to run it on the instructional machines, so it's recommand to download Camera from here, and simply double click on the jar file to run it on your own laptop.

Note: you MUST have Java installed first.

Hint: If you don't want to bother with installing Java, find a partner who does have Camera working to work with!

Once Camera opens up, select the virtual memory option to open a visualization of the virtual memory system.

At this point these should all be empty as we haven't done anything yet. Read about the statistics of your memory system in the "PROGRESS UPDATE" box at the bottom of the window. This area will keep you updated on your status through the simulation as it progresses. You can move the simulation forward, backward or start it over from the beginning using the buttons to the right of the "PROGRESS UPDATE" box.


Exercise 1: A Random String of Memory Accesses

Click the button labeled "Auto Generate Add. Ref. Str." at the right-hand side of the window. This will generate a set of ten address references. You can think of these as a series of MIPS "load" instructions reading from the memory address specified. Click the button labeled "Next" to begin the simulation.

For the rest of this exercise you are at the mercy of the "PROGRESS UPDATE" box. After each click of the "Next" button examine the contents of the box and the current state of the memory system. Try to reeeaaaaally get an understanding of what is going on in the TLB, the Page Table, and Physical Memory at each step.

Checkoff [1/4] (Don't worry, they're short)

Exercise 2: How to exhibit bad spatial locality

Now that you've seen what a random workload looks like in the VM system let's try creating a custom workload with a specific property.

Task:Your goal for this exercise is to create a workload of ten memory accesses that will cause ten TLB misses and ten Page Faults.

Think: When do you get TLB misses? How can you engineer your memory accesses so that this never happens?

You should be able to come up with such a workload on paper, but then you should run it in CAMERA to verify your work. You can specify a custom workload in CAMERA by clicking the button labeled "Self Generate Add. Ref. Str." and entering in the addresses you want to reference one at a time. When you are satisfied that you've got a valid sequence write it down and be ready to show it to your TA during checkoff.

Checkoff [2/4]

Exercise 3: Memory Systems Engineering (CAMERA)

Given your sequence of memory accesses from Exercises 2, can you find a change to a single parameter (e.g. TLB size, page table size, memory size, etc...) that would result in the same number (ten) of TLB misses but result in fewer than ten page faults?

Checkoff [3/4]

Exercise 3.5: The FINAL Break

First of all, here are some cool cat videos that I stumbled across yesterday.

Let's find out what happened in that story from last time.

After having told my GENIUS lie to my dad, I proceeded to not practice piano for the entire day. Everything was all going fine until my grandma asked the most innocent question: "How come Alex isn't practicing piano today?"

You can probably guess what happened next. Out of that whirlwind of emotions, I distinctly remember two things.

  1. My dad remarking (in Chinese): "...and you said you practiced everything twice"
  2. My dad sitting down next to me with a notepad, writing down what happened, and then drawing an arrow pointing to the right, as if to say, "Where do we go from here?"

That's a nontrivial question if I've ever heard one. Where do you go after you betray someone's trust like I did? I think I was either 5 or 6 years old at the time, and it was the first time I ever remember lying to someone and getting caught. It felt awful. Without looking up anything, I can tell you with absolute confidence the reason getting caught lying and lying in general feels bad is because it is human nature to want to be trusted. And when you lie and get caught, you feel that volume of trust that people have in you trickling away.

The following are things I want people to believe:

Sometimes, I wonder, had this episode never happened in my life, if I would still feel so strongly about being honest. I challenge you all, not now, but maybe over the weekend, to recall an important episode of your life that you found meaningful and you think you developed a lot as a person from.

Exercise 4: Putting it all in Context

Watch this gif of the simulation, and answer the questions using it.

HINT: This animation is too fast for anyone to follow! If you agree, click on this link to look at the .gif as a slideshow instead.

What is different about the setup of VMSIM as compared to CAMERA? In particular, what are P1, P2, P3, and P4? If you watch closely you'll see that this simulation reports a much higher percentage of TLB misses than the random run on CAMERA did. Why might this be? (If you have trouble following the simulation, you can turn down the speed using the slider on the bottom right.)

Checkoff [4/4]

End of the road...