Listed below are descriptions of the control signals appearing in P&H Figure 5.17.
These descriptions are drawn from Figures 5.12 and 5.16.
| signal name | meaning if 1 | meaning if 0 |
| RegDst |
The destination register is specified in bits 15-11. |
The destination register is specified in bits 20-16. |
| RegWrite |
A register value is being replaced. |
No register value is being replaced. |
| ALUSrc |
The second ALU operand is the sign-extended lower 16 bits of the instruction. |
The second ALU operand comes from a register. |
| Branch |
The instruction is a branch. |
The instruction is not a branch. |
| MemRead |
Data is to be read from memory. |
No data is to be read from memory. |
| MemWrite |
Data is to be written to memory. |
No data is to be written to memory. |
| MemtoReg |
A register's value is to be replaced by a value read from memory. |
A register's value is to be replaced by an ALU output. |