Project 4: MIPS interpreter

Errata

Administrative information

This project is due May 11 at 11:59pm. Submit your solution, files named proj4a.c and proj4b.c, as proj4.

You may work in a partnership of 2. The number of grace hours available to a partnership is the average of the grace hours unused by the individual partners. Submit one solution per partnership.

Getting started

Copy the directory ~cs61cl/code/proj4 to your home directory and name it "proj4". It includes several files: sim.c, computer.h, memory.c, memory.c, bool.h, proj4a.c, proj4a.h, proj4b.c, proj4b.h, sample.s, sample.dump, sample.output, and makefile. These are described below.

Background

In this project, you will create an instruction interpreter for a subset of MIPS code. It will fetch, disassemble, decode, and execute MIPS machine instructions, and keep track of the state of the cache. The result will be a miniature version of MARS (without the MARS assembler).

Project

The files sim.c (the top-level file), computer.h, computer.c, proj4a.c and proj4a.h comprise a framework for a MIPS simulator. Complete this part of the program by adding code to proj4a.c, specifically the disassembled and simulateInstr functions. Your simulator must be able to simulate the machine code versions of the following MIPS machine instructions:

	addu	Rdest, Rsrc1, Rsrc2
	addiu	Rdest, Rsrc1, imm
	subu	Rdest, Rsrc1, Rsrc2
	sll	Rdest, Rsrc, shamt
	srl	Rdest, Rsrc, shamt
	and	Rdest, Rsrc1, Rsrc2
	andi	Rdest, Rsrc, imm
	or	Rdest, Rsrc1, Rsrc2
	ori	Rdest, Rsrc, imm
	lui	Rdest, imm
	slt	Rdest, Rsrc1, Rsrc2
	beq	Rsrc1, Rsrc2, raddr
	bne	Rsrc1, Rsrc2, raddr
	j	address
	jal	address
	jr	Rsrc
	lw	Rdest, offset (Radd)
	sw	Rsrc, offset (Radd)

Once complete, your solution program will be able to simulate real programs that do just about anything that can be done on a real MIPS, with the notable exceptions of floating-point math and interrupts.

The files memory.c, memory.h, proj4b.c, and proj4b.h provide a framework for implementing a memory system. In the second part of this assignment, you complete the implementation of the cache, specifically by completing the newCache, cacheContains, cacheContents, updateCacheContents, and addCacheEntry.

Do not change the framework code or add any more source files; just fill in the frameworks where indicated. You may provide additional helper functions.

The framework code

The file sim.c contains the main function. It parses the command-line options, setting flags that govern how the program interacts with the user. It then calls newComputer in computer.c to create a new simulated MIPS. The newComputer function does the following:

  1. It reads the machine code into "memory", starting at "address" 0x00400000. (In keeping with the MARS convention, addresses from 0x0000000 to 0x00400000 are unused.) We assume that the program will be no more than 1024 words long. The name of the file that contains the code is given as a command-line argument.

  2. It initializes the stack pointer to 0x00404000, it initializes all other registers to 0x00000000, and it initializes the program counter to 0x00400000.

  3. It provides simulated data memory starting at address 0x00401000 and ending at address 0x00404000. It stores instructions together with data in the same memory array.

On return from newComputer, the main function calls simulate in computer.c, entering a loop that repeatedly fetches and executes instructions, printing information as it goes:

The framework code supports several command line options:

  -i   runs the program in "interactive mode". In this mode, the program prints a ">" prompt and waits for you to type a return before simulating each instruction. If you type a "q" (for "quit") followed by a return, the program exits. If this option isn't specified, the only way to terminate the program is to have it simulate an instruction that's not one of those listed on the previous page.
  -r   prints all registers after the execution of an instruction. If this option isn't specified, only the register that was affected by the instruction should be printed; for a branch, a jump, or a store, which don't affect any registers, the framework code prints a message saying that no registers were affected. (Your code needs to signal when a simulated instruction doesn't affect any registers; see "Details of simulation" below.)
  -m   prints all data memory locations that contain nonzero values after the execution of an instruction. If this option isn't specified, only the memory location that was affected by the instruction should be printed; for any instruction that's not sw, the framework code prints a message saying that no memory locations were affected. (Your code needs to signal when a simulated instruction doesn't affect memory; see "Details of simulation" below.)
  -c prints the contents of the cache after each instruction.
  -aarg sets the cache associativity to arg. The default is 1 (i.e., direct-mapped); arg must be a power of 2.
  -sarg sets the number of cache sets to arg. The default is 4 (i.e. four cache sets); arg must be a power of 2. Each set will have as many entries as the associativity of the cache.
  -barg sets the cache block size to arg words. If this option is unspecified, the block size is set to 2; arg must be a power of 2.
  -d   is a debugging flag that you might find useful. Any output your program produces other than what is specified in this document should be governed by the -d option.

Details of simulation

Part of your task is to complete the simulateInstr function (perhaps adding auxiliary functions), which simulates the execution of a MIPS instruction. Your simulation of the instructions specified previously should basically mimic their behavior in MIPS and MARS. You may assume that the simulated instructions wil not address instruction memory illegally. If the program encounters an instructon that's not one of the ones listed above, it should quit.

The simulateInstr function takes arguments changedReg and changedMem that govern the output of the simulation. You need to return appropriate values in these arguments.

Details of disassembly

Another part of the project is to provide the code for the disassembled function, plus any auxiliary functions that are appropriate. You may assume that the simulated instructions will not address instruction memory illegally. If the program encounters an instruction that's not one of the ones just listed, it should quit.

Almost all the printing in the framework code is done in the printInfo function. Also printed is the output of the disassembled function, one of the functions you are to complete, which requires some special attention. Although it just prints the instructions and its operands in text, we will be grading your project with automated scripts. Therefore, the output must follow this part of the specification exactly. Here are the details on the output format:

Here are examples of good instructions:

	addiu     $1, $0, -2
	lw        $1, 8($3)
	srl       $6, $7, 3
	ori       $1, $1, 0x1234
	lui       $10, 0x5678
	j         0x0040002c
	bne       $3, $4, 0x00400044

Here are examples of bad instructions:

	addiu     $1, $0, 0xffffffff     # shouldn't print hex for addiu
	sw        $1, 0x8($3)            # shouldn't print hex for sw
	sll       $a1, $a0, 3            # should use reg numbers instead of names
	srl       $6,$7,3                # no spaces between arguments
	ori       $1 $1 0x1234           # forgot commas
	lui       $t0, 0x0000ABCD        # hex should be lowercase and not zero extended
	j         54345                  # address should be in hex
	jal       00400548               # forgot the leading 0x
	bne       $3, $4, 4              # needs full target address in hex

disassembled must call exit(0) if an unsupported operation is detected.

Note that the result returned by disassembled is freed in the simulate function. Therefore disassembled must call malloc to reserve memory for this space.

Details relating to cache updates

Finally, you are to complete functions that represent operation of the cache. Some requirements:

Testing

The files sample.s and sample.output in the proj4 directory provide an example output that you may use for a "sanity check". We do not include any other test input files for this project. You must write the test cases in MIPS, use MARS to assemble them, and then dump the binary code.

makefile is a script that builds an executable from a bunch of source and object files. This makefile is provided for your convenience. You do not need to modify it. Simply type "gmake" at the shell prompt to build your simulator.

Using MARS to produce test cases

A first step in testing is to write test code in MIPS. Here are some important guidelines to consider as you write your MIPS test code:

Generating binary files

The procedure for generating input files for the simulator is straightforward. Here are the steps:

  1. Write your test program in MIPS. Make sure you only use supported instructions, and avoid assembler directives that set up .data memory. Suppose your test file is named test0.s. Terminate your program with a single unsupported instruction (e.g., slti). As mentioned previously, attempting to execute an unsupported instruction will cause the simulator to quit.

  2. Debug your MIPS code with MARS.

  3. Dump the code from MARS using the Dump Memory selection from the File menu. Be sure to select the .text segment in the dropdown before doing this, or you might accidentally dump the data memory. You should also select the Binary dump format for this project.  MARS will dump the binary instruction into a file of your choosing.

  4. Now test0.dump is a valid input to the simulator. We recommend that you save all of your .s and .dump test files in an orderly fashion. This way, when you think you are done with the simulator, you will have a comprehensive battery of tests to put it through before submitting.

Additional pointers

To view a binary dump file in emacs, open it like you normally would and type M-x hexl-mode.