(1) Implement a 3 input NAND, and a 2 input OR using transistors. Also, implement a 2-1 multiplexer using 6 transistors
(2)
What is the truth table for this functon?
(3)
There are two resistors, R1 and R2, and 2 capacitors, C1 and C2. When one resistor and capacitor are arranged in the way presented, the voltage at A is 0 before the switch is closed. For different combinations of the resistors and capacitors, the graphs are shown for voltage at A as a function of time. Which is the larger capacitor? The larger resistor?
(4) Implement the following gates using transistors. If B
and C are both 1, and A changes from 0 to 1, graph the voltage at X
and Y as a function of time.
(5)
The node A starts at 0 when the voltage on the input goes from 0 to 5 volts. (Vcc is also 5 volts). What is the voltage at A as a function of time. Also, trace the path taken to get to that final voltage on the graph of the transistor's behavior. (HINT. The Vgs voltage is NOT constant!)