Table of Contents
PPT Slide
2 PROGRAMMABLE GATE ARRAY
2 Programmable Gate Array (cont.)
3 CONFIGURABLE LOGIC BLOCK
3 Configurable Logic Block (cont.)
3 Configurable Logic Block (cont.)
4 INPUT/OUTPUT BLOCK (Note: only 58 connected)
5 ROUTING/INTERCONNECT
6 DESIGN FLOW
7 CLOCK ENABLE – FF: FDRE
7 Clock Enable (cont.)
|
Author: chrisc
|