--------------------------------------------------------------------------------
CS150 - Spring 2010
Discussion 01
1/25/2010
--------------------------------------------------------------------------------

--------------------------------------------------------------------------------
Agenda
--------------------------------------------------------------------------------
1.) Welcome, greeting
2.) Administrative questions
3.) Basic FPGA Architecture
	Hierarchy
		FPGA Fabric
			Array interconnect
			Combinational Logic Blocks
			Other specialized hard IP (this was just mentioned - no details were given)
		Combinational Logic Blocks
			SLICEL
				LUTs
				LUT MUXs (F7/8)
				Carry Chain
				Flip-flops
4.) LUTs as Function Generators
	Gates vs. function generators - what's the big idea?
	How are function generators implemented?
	How do you make larger (7, 8 input) function generators using the 6-input function generators in a Virtex-5 SLICE?
--------------------------------------------------------------------------------