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CS150 - Spring 2010
Discussion 02
2/1/2010

by C F written for Brandon M.
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Agenda
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The last thing I got to in the first discussion was how to build larger function 
generators using F{7,8} MUXs.  To ensure continuity, I would proceed as follows:

1.) Greeting
2.) Questions (administrative, course in general)?
	** I will modify my homework question policy with my students in the 
		following week
3.) Basic FPGA Architecture: Function Generators (Part II)
	** This is the continuation from the first week
	3a.) Remind the class very briefly about using MUXs to build larger LUTs
		** Just say it!  They have seen enough of this and won't need a full-on 
		explanation (unless someone who asks for it wants it)
	3b.) Ask the class: how many functions can be derived from an N-input LUT?
	3c.) SLICEM
		3ci.) Briefly explain what distributed RAM is.  Don't go into detail 
			about what Block RAM is but mention that it is an alternative
			(and how they will be using both in the project)
		3cii.) Show how LUTs can be used to implement N:1 distributed RAM cells
			3cii(a).) Start from the 32:1 case
				- Explain why the common primitive is 32:1 not 64:1
					(Memories typically have shared address lines so you can use 
					5LUTs easily)
			3cii(b).) Use F{7,8} MUXs to build up to 128:1 cells
			3cii(c).) Use F{7,8} MUXs and 6LUTs to build 256:1 cells
		3ciii.) Show how LUTs can be used to build shift registers 
			(efficient SRLs)
			- Explain what a shift register is.  They will likely have seen it 
				before, but not have called it that
			- This should build off of the distributed RAM discussion
4.) Flip-flops
	
	Introduction:
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	4a.) Start with a flip-flop as a black box with edge-triggered timing
		characteristics
	4b.) Explain setup, hold, clock-to-Q, and "combinational logic delay" times
	4c.) Explain the level-sensitive latch (LSL), and its input-output 
		characteristics
	
	Implementation & Example:
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	4d.) Decompose the flip-flop into two LSLs, the first having an inverted 
		clock
	4e.) With the chained LSL model, show why flip-flops are edge-triggered.
		** This is the trickiest part of the discussion and students will 
			likely have problems seeing it.
			
			Here is how I like to teach it:
			** Call an LSL with C=0 "opaque" and with C=1 "transparent"
			4ei.) Draw the 2 LSL system up on the board and label inputs and 
				outputs
			4eii.) Draw a waveform diagram with the intermediate data line 
				between the first and second LSL shown.  So, it should have:
				Clock
				Input
				Output
				Intermediate (the data connection between the 1st and 2nd LSL)
			4eiii.) Place an signal that will eventually change the output value
				at the input of the 1st LSL during the period when the clock is
				**LOW.**
				Explain that since the first LSL is transparent, the signal 
				passes through and gets stuck at the second level which is 
				opaque.
				** 	While the input is making its way to the output, label it as 
					follows:
					"LSL #{1,2} transparent/opaque"
					So that people can keep track
			4eiv.) Move time forward to the next clock falling edge
			4ev.) Advance the input to the rising edge of the clock and explain 
				how the:
				1st LSL "catches" the value as it becomes opaque
				2nd LSL passes the value as it is transparent
			4evi.) Advance time forward to the next rising edge and advance the 
				inputs/outputs to the next falling edge
				Show how it is now the 2nd LSL that has "caught" the input and 
				that the 1st LSL can receive another value as it is transparent
				
	I would spend as much time as is necessary to make sure that this concept is 
	solid.  Historically, it has taken up from the 20 min mark to the end of the 
	discussion, so I think it will do so here as well.  Use visuals!  I have 
	found that the picture + waveforms definitely help, but what also helps are 
	hand motions showing how the signals are propagating like waves.
	
	One note on ordering: I mentioned that the input should first arrive when 
	the clock is low.  This is because in the second phase of the example, you 
	will be able to demonstrate rising edge behavior.  If you start the example 
	when the clock is high, it takes two steps to reach the rising edge.  So, 
	by starting when the clock is low, you get to the point faster.  I've found 
	that this helps in their understanding.
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