Outline

2/17/97


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Table of Contents

Outline

Resistor-Transistor Inverter

CMOS Inverter

Inertial & Transmission-Line Delays

Transition Times

Propagation Delay

Pulse Propagation

Hazards & Glitches

Hazards & Glitches

Hazards & Glitches

Static and Dynamic Hazards

Dynamic Hazard

Hazards & Glitches

Aside: Redundancy & Testability

Timing Diagrams

Timing Diagrams

Timing Diagrams

Timing Diagrams

Timing Diagrams

Timing Diagrams - Data

Timing Diagrams

Email: rnewton@ic.eecs.berkeley.edu

Home Page: http://www-inst.eecs.Berkeley.edu/~cs150