Implementation Using D Flip-Flops

? Can use positive-edge-triggered D flop-flop directly to implement storage element:

CLK

Present

State

Q1 = { 00,01,11}

Input

?1 = { 5, 10, 25 }

Output

Z1 = { D0, R0, R5,

R10, R15, R20 }

Output

Logic

?

Next-State

Logic

?

Previous slide

Next slide

Back to first slide

View graphic version