Lab 3 - Finite State Machine on Xilinx

In this lab, you will be downloading the schematic you created in Lab 2 onto the Xilinx chip. There shouldn't be too much thinking for this lab, just follow the directions and you should end up with a lock with a code on the Xilinx chip. You will not be able to complete the entire lab outside of 204B Cory. You will be able to convert the schematic to EDIF file format and compile to the BIT file before lab.

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