Welcome to the Spring 2022 CS152 and CS252A web page. This semester the undergraduate and graduate computer architecture classes will be sharing lectures, and so the course web page has been combined.

CS152 is intended to provide a foundation for students interested in performance programming, compilers, and operating systems, as well as computer architecture and engineering. Our goal is for you to better understand how software interacts with hardware, and to understand how trends in technology, applications, and economics drive continuing changes in the field. The course will cover the different forms of parallelism found in applications (instruction-level, data-level, thread-level, gate-level) and how these can be exploited with various architectural features. We will cover pipelining, superscalar, speculative and out-of-order execution, vector machines, VLIW machines, multithreading, graphics processing units, and parallel microprocessors. We will also explore the design of memory systems including caches, virtual memory, and DRAM. An important part of CS152 is series of lab assignments using real microprocessor designs implemented in the Chisel hardware description language, and running as simulators and FPGA emulators hosted in the Amazon cloud (FireSim). These simulators will give you an in-depth look at a variety of processor architectural techniques. Our objective is that you will understand all the major concepts used in modern microprocessors by the end of the semester.

CS252A is intended to provide essential background for students intending to pursue research in computer architecture or related fields, and also provides preparation for the Berkeley EECS computer architecture oral prelim examination. An important part of CS252A is reading and discussion of classic architecture papers, as well as a substantial course project.

Course Calendar with Handouts

Note: Tentative, schedule subject to change!

Week Date Lecture Readings
5th Edition
6th Edition
Assignments / Handouts
1 Tue Jan 18 L1: Introduction, Early Machines PDF Ch. 1, App. A Ch. 1, App. A
Thu Jan 20 L2: Simple Machine Implementations, Microcoding PDF Lab 1 PDF
Handout 1
Blank microcode table
Thu Jan 20 CS252A No Readings Discussion
Fri Jan 21 CS152 Section 1: Microcode, Lab 1 Overview Slides Worksheet 1 PDF
2 Tue Jan 25 L3: Pipelining PDF App. C.1-C.3 App. C.1-C.3 PS 1 (PDF, DOC)
Thu Jan 27 L4: Pipelining II PDF App. C.4-C.6 App. C.4-C.6
Thu Jan 27 CS252A Readings Discussion "Design of the B5000 System", Lonergan, King, 1961
"Architecture of the IBM System/360", Amdahl, Blaauw, Brooks, 1964
Fri Jan 28 CS152 Section 2: Pipelining review Slides     Worksheet 2 (PDF)
3 Tue Feb 1 L5: Memory Hierarchy PDF App. B.1-B.2, Ch. 2.1-2.3 App. B.1-B.2, Ch. 2.1-2.2  
Thu Feb 3 L6: Memory Hierarchy II PDF App. B.3 App. B.3 PS 1 due
PS 1 solutions
Thu Feb 3 CS252A Readings Discussion "The Case for the Reduced Instruction Set Computer", Patterson, Ditzel, 1980
Comments on the "The Case for the RISC", Clark, Strecker, 1980
"Performance from architecture: comparing a RISC and CISC with similar hardware organization", Bhandarkar, Clark, 1991
Fri Feb 4 CS152 Section 3: Memory Hierarchy Slides     Worksheet 3 (PDF) Handout 2
4 Tue Feb 8 L7: Address Translation PDF App. B. 4-7 App. B. 4-7 PS 2 (PDF, DOC)
Thu Feb 10 L8: Apple Guest Lecture: Prefetching Lab 1 due
Lab 2 PDF
Thu Feb 10 CS252A Projects Office Hours (Email JohnW for Zoom link)
Fri Feb 11 CS152 Section 4: Address Translation and Lab 2 Overview/PS 1 Review Slides     Worksheet 4 (PDF)
5 Tue Feb 15 L9: Virtual Memory PDF    
Thu Feb 17 L10: Complex pipelines, out-of-order issue, register renaming PDF Ch. 3.1,3.4-3.5 Ch. 3.1,3.4-3.6 PS 2 due
CS252A project proposals due
Thu Feb 17 CS252A Readings Discussion "IBM's Single-Processor Supercomputer Efforts", Smotherman, Spicer, CACM, 53(1), 2010
"Implementation of Precise Interrupts in Pipelined Processors" , Smith, Pleszkun, ISCA, 1985 (IEEE Trans. Computer Journal version)
"Parallel Operation in the Control Data 6600", Thornton, Proceedings of the Fall Joint Computers Conference, vol 26, pp. 33-40, 1964
Fri Feb 18 CS152 Section 5: Midterm 1 Review Slides     PS 2 solutions
6 Tue Feb 22 Midterm 1: (L1-L9) Solutions    
Thu Feb 24 L11: Out-of-order execution PDF Ch. 3.6, 3.8 Ch. 3.6, 3.8 PS 3 (PDF, DOC)
Thu Feb 24 CS252A Project Proposal Discussion, Session I
Fri Feb 25 CS152 Section 6: Out-of-order Execution Slides Worksheet 6 (PDF)
7 Tue Mar 1 Finish L11: Out-of-order execution PDF Ch. 3.6, 3.8 Ch. 3.6, 3.8 Lab 2 due
Thu Mar 3 L12: Branch Prediction PDF Ch. 3.3,3.9-3.10
Fri Mar 4 CS252A Project Checkpoint Revised Proposal Due
Fri Mar 4
8 Tue Mar 8 Apple Guest Lecture PS 3 due (Solutions)
Lab 3 PDF
Thu Mar 10 L13: VLIW PDF Ch. 3.2,3.7 Ch. 3.2,3.7 PS 4 (PDF, DOC)
Thu Mar 10 CS252A Readings Discussion "An Efficient Algorithm for Exploiting Multiple Arithmetic units", Tomasulo, IBM Journal, January 1967
"Decoupled Access/Execute Computer Architectures", Smith, ISCA 1982 (ACM TOCS version)
"The MIPS R10000 Superscalar microprocessor", Yeager, IEEE Micro 16(2), 1996
Fri Mar 11 CS152 Section 7: Branch Predictions and VLIW Slides Worksheet 7 (PDF)
9 Tue Mar 15 L14: Multithreading PDF Ch. 3.12 Ch. 3.11
Thu Mar 17 L15: Vectors PDF Ch. 4.1-4.3 (App. G)
Thu Mar 17 CS252A Readings Discussion "Combining Branch Predictors", McFarling, DEC WRL Technical Note TN-36, 1993
"Dynamic Branch Prediction with Perceptrons", Jimenez, Lin, HPCA 2001
"A case for (partially) TAgged GEometric history length branch prediction , Seznec, Michaud, Journal of Instruction Level Parallelism (JILP), 2006"
Fri Mar 19 CS152 Section 8: Multithreading and Vectors Slides Worksheet 8 (PDF)
10 Mar 21-25 Spring Break      
11 Tue Mar 29 L16: GPUs PDF Ch. 4.4-4.9 Ch. 4.4-4.9 PS 4 due
PS 4 Solutions
Lab 3 due
Thu Mar 31 L17: Cache Coherence PDF Ch. 4.1-4.3 (App. G) Ch. 4.1-4.3 (App. G)
Thu Mar 31 CS252A Readings Discussion
"The CRAY-1 Computer System", Russel, CACM 1978
"Very Long Instruction Word Architectures and the ELI-512", Fisher, ISCA 1983
"A VLIW Architecture for a Trace Scheduling Compiler", Colwell et al., IEEE Trans. Computers, 1988
Fri Apr 1 CS152 Section 9: Midterm 2 Review Slides Worksheet 10 (PDF)
12 Tue Apr 5 L18: Cache Coherence II, Directories PDF Ch. 5.1-5.4 Ch. 5.1-5.4
Thu Apr 7 Midterm 2: L10-16 Solutions
Fri Apr 8 CS152 Section 10: Cache Coherence Slides   Worksheet 11 (PDF)
Handout 6 Handout 7

Lab 4
RVV 0.10 [PDF]

Lab 5
Mon Apr 11 CS252A Project Checkpoint Project update
Tue Apr 12 L19: Memory Consistency Models, Synchronization PDF Ch. 5.1, 5.5-5.6 Ch. 5.1, 5.5-5.6
Thu Apr 14 L20: Power and Energy PDF
Thu Apr 14 CS252A Readings Discussion "The Tera Computer System", Alverson et al, ICS 1990
"Shared Memory Consistency Models: A Tutorial", Adve, Gharachorloo, DEC WRL TR, 1995
"The SGI Origin: a ccNUMA highly scalable server", Laudon, Lenoski, ISCA 1997
Fri Apr 15 CS152 Section 11: Memory Consistency and Synchronization Slides Worksheet 12 (PDF)
14 Tue Apr 19 L21: Warehouse-Scale Computing PDF Ch. 5.2-5.3 Ch. 5.2-5.3 Lab 4 due
Thu Apr 21 L22: 2017 Turing Award Lecture New Golden Age for Computer Architecture: Domain-Specific Hardware/Software Co-Design, Enhanced Security, Open Instruction Sets, and Agile Chip Development, David Patterson and John Hennessy Ch. 7
Fri Apr 22
15 Tue Apr 26 L23: Reconfigurable Computing PDF Ch. 6 Ch. 6 PS 5 due
PS 5 Solutions
Thu Apr 28 L24: Last lecture: Wrap-up PDF
Thu Apr 28 CS252A Project Checkpoint Project update
Fri Apr 29 CS152 Section 13: Final Review (Part 1) Slides
16 Tue May 3 No lecture - RRR Week Lab 5 due
Thu May 5 No CS152 lecture - RRR Week
Thu May 6 CS 252A Final Project Presentations
Fri May 7 CS152 Section 14: Final Review
17 Wed May 11 CS 152 Final Exam: 11:30-2:30PM PDT (Exam Group 10) Solutions
Fri May 14 CS 252A Final Project Papers due, 11:59PM PDT Email pdf to all instructors.