Welcome to the web page for Fall 2015 CS252 Graduate Computer Architecture. CS252 provides essential background for students intending to pursue research in computer architecture or related fields, and also provides preparation for the Berkeley EECS computer architecture oral prelim examination.
The class explores: the major architectural design patterns, including microcoding, pipelining, decoupling, in-order and out-of-order superscalars, vector/SIMD/GPUs, VLIW, multithreading, shared-memory multiprocessors, message-passing multicomputers; protection, security, virtual memory and virtual machines; networking and storage architectures; resiliency to hard and soft errors; power, energy, and thermal issues; evaluation methodologies. These concepts will be explored in the context set by the historical and predicted future trajectory of applications, technology, programming models, and business models.
The prerequisite for the class is CS152 or an equivalent upper division computer architecture course.
Date | Lecture | Background Readings | Assignments (Paper reviews due 11:59PM evening before lecture) |
Wed Aug 26 | L1: Introduction, Class Organization PPTX PDF Video | ||
Mon Aug 31 | L2: Instruction Set Architectures PPTX PDF Video | H&P App. A | |
Wed Sep 2 | L3: From CISC to RISC PPTX PDF Video |
"Design
of the B5000 System", Lonergan, King, 1961
"Architecture of the IBM System/360", Amdahl, Blaauw, Brooks, 1964 |
|
Mon Sep 7 | No lecture: Labor Day Holiday | ||
Wed Sep 9 | L4: Pipelining PPTX PDF Video | H&P App. C |
"The
Case for the Reduced Instruction Set Computer",
Patterson, Ditzel, 1980
Comments on the "The Case for the RISC", Clark, Strecker, 1980 "Performance from architecture: comparing a RISC and CISC with similar hardware organization", Bhandarkar, Clark, 1991 |
Mon Sep 14 | L5: Early Out-of-Order Processing PPTX PDF | H&P Ch. 3.1-3.6 |
"IBM's
Single-Processor Supercomputer Efforts", Smotherman, Spicer,
CACM, 53(1), 2010 "Implementation of Precise Interrupts in Pipelined Processors", Smith, Pleszkun, ISCA, 1985 (IEEE Trans. Computer Journal version) |
Wed Sep 16 | L6: Modern Out-of-Order Processors PPTX PDF | H&P Ch. 3.8-3.11, 3.13 |
"Parallel
Operation in the Control Data 6600", Thornton, Proceedings of
the Fall Joint Computers Conference, vol 26, pp. 33-40, 1964
"Decoupled Access/Execute Computer Architectures", Smith, ISCA 1982 (ACM TOCS version) |
Mon Sep 21 | L7: Out-of-Order Processors II PPTX PDF |
"An Efficient Algorithm for Exploiting Multiple Arithmetic units", Tomasulo, IBM Journal, January 1967 |
|
Wed Sep 23 | L8: Out-of-Order Processors III PPTX PDF |
"The
MIPS R10000 Superscalar microprocessor", Yeager, IEEE Micro
16(2), 1996 "Combining Branch Predictors", McFarling, DEC WRL Technical Note TN-36, 1993 |
|
Mon Sep 28 | L9: Vector Supercomputers PPTX PDF Video | H&P App. G | "Intel's Haswell CPU Microarchitecture", David Kanter, Realworld Tech, 2012 |
Wed Sep 30 | L10: VLIW Architectures PPTX PDF Video | H&P Ch. 3.7, App. H |
"The CRAY-1 Computer System", Russel, CACM 1978 "The Cray Black Widow", Abts et al., Supercomputing 2007 |
Mon Oct 5 | L11: Memory PPTX PDF | H&P Ch. 2.3, App. B.1-B.3 |
"Very Long Instruction Word Architectures and the
ELI-512", Fisher, ISCA 1983 "A VLIW Architecture for a Trace Scheduling Compiler", Colwell et al., IEEE Trans. Computers, 1988 |
Wed Oct 7 | L12: Cache coherence PPTX PDF | H&P Ch. 5.1-5.4 |
"Understanding
the Energy Consumption of Dynamic Random Access
Memories", Vogelsang, MICRO-2010. "Hybrid Memory Cube", Pawlowski, slide presentation, HotChips 2011. |
Mon Oct 12 | L13: Multithreading PPTX PDF | H&P Ch. 3.12 | No paper readings. |
Wed Oct 14 | L14: Synchronization and Memory models PPTX PDF | H&P Ch. 5.5-5.8 |
"The Tera
Computer System"Alverson et al, ICS 1990 "Exploiting choice: instruction fetch and issue on an implementable simultaneous multithreading processor", Tullsen et al., ISCA 1996 |
Mon Oct 19 | L14: Synchronization and Memory models, part II | H&P Ch. 2.4-2.7 |
"The SGI Origin: a
ccNUMA highly scalable server", Laudon, Lenoski, ISCA 1997
"IBM POWER7 multicore server processor", Sinharoy et al., IBM J. R&D, 2011 |
Wed Oct 21 | L15: Address Translation and Protection PPTX PDF | "Shared Memory Consistency Models: A Tutorial", Adve, Gharachorloo, DEC WRL TR, 1995 | |
Sun Oct 25 | Project proposal due by 11:59PM. | ||
Mon Oct 26 |
L16: Virtual Memory and Caches
PPTX
PDF L17: Virtual Machines PPTX PDF |
No paper readings. | |
Wed Oct 28 | L18: I/O PPTX PDF |
"Survey
of Virtual Machine Research", Goldberg, IEEE Computer,
1974 "Bringing Virtualization to the x86 Architecture with the Original VMware Workstation", Bugnion et al., ACM TOCS, November 2012 |
|
Mon Nov 2 | Group Project Proposal Presentations |
"On the Design of Display Processors", Myer, Sutherland, CACM 1968. "A Case for Redundant Arrays of Inexpensive Disks (RAID)", Patterson, Gibson, Katz, SIGMOD 1988 |
|
Wed Nov 4 | Midterm Exam | No paper readings | |
Mon Nov 9 | |||
Wed Nov 11 | No lecture: Veterans Day Holiday | No paper readings | |
Mon Nov 16 | Individual group project meetings | No paper readings | |
Wed Nov 18 | Individual group project meetings | No paper readings | |
Mon Nov 23 | Individual group project meetings | No paper readings | |
Wed Nov 25 | No lecture - Thanksgiving Holiday | No paper readings | |
Mon Nov 30 | Individual group project meetings | No paper readings | |
Wed Dec 2 | Individual group project meetings | No paper readings | |
Wed Dec 9 | Final Project Presentations | 10AM-12:30PM Visual Computing Lab (5th Floor Soda) | |
Fri Dec 11 | Final Project Paper | Due 11:59PM |
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