CS61C Homework 6
ALU in Logisim
Due: |
21.03.2006 (little-endian!) @ 2359 |
HW TA: |
David Eitan Poll <cs61c-tb
at imail dot eecs dot berkeley dot edu> |
So, now
you’ve learned about logic gates and combinational logic; it’s time to put that
newfound knowledge to work! I’m
sure you’ll find it quite ALUminating!
This will
add
to your experience and
shift your perspective on what we’ve been learning!
In this assignment, you will implement an 8 bit ALU in logisim (the image
above is for a 4 bit ALU).
Copy the homework 6 directory to your home folder with the following command:
% cp -r ~cs61c/hw/06 ~/hwThis will copy in
alu.circ
, the file you will submit your assignment in. You must use this file or points may be deducted for not following directions.
The eight functions that you will implement are: add, subtract, and, or, shift
left logical, less than, shift right logical, and shift right arithmetic. The ALU will
perform a desired function on two 8-bit inputs (X and Y, where x0 is the lowest
order bit for x, etc...) and output the result (RESULT). The function will be
determined by the value of a control signal (S), as listed below. In addition
to the 8 bits of output provided in RESULT, two additional outputs will be
provided: unsigned overflow, and signed overflow. Unsigned overflow will have
a high value iff the command was an add and unsigned overflow occured. Signed
overflow will have a high value iff the command was an add or a subtract, and
signed overflow occured. (You need not worry about unsigned overflow for subtractions.)
Here's what occurs for each operation:
S |
Op |
Result |
000 |
add |
X + Y
(signal if either type of overflow occurs) |
001 |
sub |
X - Y
(signal if signed overflow occurs) |
010 |
bitwise OR |
X | Y |
011 |
bitwise AND |
X & Y |
100 |
sll |
X << Y
(but logically, don't sign extend!) |
101 |
signed |
X < Y
(return 1 if X < Y, otherwise 0) |
110 |
srl |
X >> Y
(but logically, don't sign extend!) |
111 |
sra |
X >> Y
(but arithmetically, do sign extend!) |
Think about intuitive ways to test your ALU. If the grader can look at your
logisim file and immediately see that everything is in working order, it will
be to your advantage. You might consider some method for automatically testing
your ALU, such as a counter. Perhaps you should add testing logic that signals
an error if an incorrect value is seen. Think about this, we want to see some
form of testing suite in your outter-most circuit design.
You may only use tools from the "Base" and "Gates" libraries in Logisim. Do
not use any items from the Memory, Plexers, Arithmetic, or Legacy libraries.
Any ALU pieces built using any of these illegal components will be given no
credit.
If you are having difficulty using Logisim on nova (i.e. the GUI interface is unusable), ssh into cory and run logisim from there. You can ssh using the following command:
% ssh cory
Type in "yes" when it asks you something about a key, then enter in your password.
Create a directory named
'hw6'
containing a
README,
alu.circ,
and any additional files needed for your submission. While in that directory,
run
'submit hw6'.
If you included an image, make sure to say "yes" when the submit script prompts
you about it.