CS61c Summer 2006 -- Project 3


For this project you will implement a data path which fetches 8-bit instructions from memory and executes them. Details on what components your datapath must have as well as the instructions you must implement can be found below. The project will be due by the end of the day, Tuesday, August 8. The associated Homework 6 will be due by the end of the day, Saturday, August 5.

Logisim 2

You will be using Logisim 2 for this project. You can run it on the instructional machines by typing java -jar ~cs61c/bin/logisim.jar and you can download it to your home machine from the Logisim Website.

Logisim 2 is more stable than it used to be (if you've heard rumors), but you should still be careful when using it. Some useful tips:

1. Save early, save often, make backups. This software will crash on you. Be prepared for this to happen. In addition, make sure you make fairly frequent backups of your files, as you may hit a bug that corrupts your file.

2. A tutorial/user guide is now available from the Logisim developer.

3. Feel free to run Logisim at home. As it is writen in Java you should be able to run it with the same results anywhere.

Submitting Your Assignment

You must submit your CPU (named cpu.circ) and your sample program (named sum.code) online. Do this by creating a directory called proj3, creating your files, and typing submit proj3.

Readability is an important factor in your grade for this project. You should start by creating sub-circuits for the various processor components you will need. The final design should be a combination of these subcircuits that is as easy to understand as possible.

Homework 6

You should begin your work on this project by creating your ALU. You must turn in your ALU by the end of the day, Saturday, August 5 as a checkpoint along the way to completing the project and to recieve credit for Homework 6. Do this by creating a file called alu.circ and typing submit hw6 from the directory that contains it. As with the full CPU, readability is essential in this circuit.

Components you must have


The PC will be an 8-bit register holding the address of current instruction which is being fetched and executed from the instruction memory.

Register File

You will have a register file which has 2 8-bit wide registers. You should be able to read from the two registers asynchronously and write to a single register synchronously.


You will have separate instruction and data memories (thus prohibitting self-modifying code). Logisim provides a memory module which you can use.The instruction memory is 8 bits wide and addressed with 8 bits (thus 256 instruction memory locations). The data memory is also 8 bits wide but is only addressed with 4 bits (thus there are only 16 data memory locations). We use byte addressing.

You can change the contents of a logisim RAM module by choosing the "poke" tool (the little hand). Double click on the memory cell you want to change and type the new value in hexadecimal.

You can also save the contents of a RAM to a file and load it back by right-clicking on the RAM and using the "Save Image" and "Load Image" menu options. Once you've saved a RAM file, you can edit it with a text editor; each line is a one-byte hexadecimal value (don't mess with the header!). A sample file has been provided.

To make a RAM work properly, you must:

  1. Connect the clock to the RAM (at the little triangle symbol on the bottom)
  2. Connect an address line to the "A" input
  3. Connect both the data input and output to the "D" terminal
  4. Connect a control line to "out"; this line should be "0" when the RAM is to be written (a better name for this pin would be "write disable" or "read enable")
This might seem a bit strange. The "D" terminal is both an input and an output. The behavior of the RAM block depends on what value you provide on the "out" pin. On the rising edge of the clock, Logisim checks the "out" pin and: There's more detail on this in the Logisim manual page on RAMs. We've also included a sample circuit demonstrating how to use Logisim RAMs in both read-only and read-write mode.


You will have an ALU which supports ADD, SUBTRACT, BITWISE AND, and BITWISE OR. All these instructions operate on 8-bit wide data.

Instructions you must implement

All instructions have a 3-bit opcode.
If this opcode is 0, the the instruction is an R-type instruction and is encoded as follows:
7 6 5 4 3 2 1 0
op rd rs1 rs2 func
op = opcode
rd = destination register
rs1 = source register 1
rs2 = source register 2
func = function code

If this opcode is anything besides 0 then it is an I-type instruction and is encoded as follows:
7 6 5 4 3 2 1 0
op rd imm
op = opcode
rd = destination register
imm = immediate

R-type instructions

You must implement the following R-type instructions:
Instruction Opcode Function code meaning
or $rd,$rs1,$rs2 0 0 R[rd] = R[rs1] | R[rs2]; PC = PC + 1
add $rd,$rs1,$rs2 0 1 R[rd] = R[rs1] + R[rs2]; PC = PC + 1
and $rd,$rs1,$rs2 0 2 R[rd] = R[rs1] & R[rs2]; PC = PC + 1
sub $rd,$rs1,$rs2 0 3 R[rd] = R[rs1] - R[rs2]; PC = PC + 1


I-type instructions

You must implement the following I-type instructions: .
Instruction Opcode Meaning
load $rd,imm 1 R[rd] = MEM[imm]; PC = PC + 1
store $rd,imm 2 MEM[imm] = R[rd]; PC = PC + 1
lui $rd,imm 3 R[rd] = {imm, 0000}; PC = PC + 1
ori $rd,imm 4 R[rd] = R[rd] | zero_extended(imm); PC = PC + 1
jeq imm 5 if R[0] == R[1] then PC = {upper_four_bits(PC), imm} else PC = PC + 1
j imm 6 PC = {upper_four_bits(PC), imm}
halt 7 nothing happens; PC = PC

Allowed Libraries

You may use any Logisim components in these libraries (which can be accessed from the Project menu in Logisim): Base, Gates, Plexers, and Memory.

You may not use any components from the Arithmetic library. (And you should avoid the Legacy library.)

Testing your circuit

Write a program which computes the value of sum(n) = 1 + 2 + 3 + ... + n. It should read the value n from MEM[0x0] and store the result in MEM[0xF]. You must submit this program with your completed CPU. The last instruction in your program should be a halt.