University of California at Berkeley
College of Engineering
Department of Electrical Engineering and Computer Science

CS61C, Summer 2010

HW 7 - ALU Design

Due Saturday, 07/24/2010 @ 11:59pm

NOTE: The operations have been modified slightly (see table below). This was done to match the requirements for Project 2, so you can copy your ALU over with minimal changes.

In this assignment, you will implement a 16 bit ALU in logisim.


The nine eight functions that you will implement are: add, subtract, OR, AND, shift left logical, shift right logical, shift right arithmetic, set less than. , and EQUAL. The ALU will perform the desired function on two 16-bit inputs (X and Y, where x0 is the lowest order bit for x, y0 is the lowest order bit for y, etc...) and output the result on the 16-bit Result bus. The function will be determined by the value of a control signal (Select), as listed below.

In addition to the 16 bits of output produced in Result, three two additional outputs will be produced: unsigned overflow and signed overflow and equals.

For the shift instructions detailed below (sll, srl, sra), the shift amount is ONLY the least 4 significant bits of Y. You can ignore the other bits of Y.

Here's what occurs for each operation:

Select op Result
000 or X | Y
001 and X & Y
010 add X + Y (and signal if either overflow occurs)
011 sub X - Y (and signal if signed overflow occurs)
100 sll X << Y (logically, don't sign extend!)
101 srl X >> Y (logically, don't sign extend!)
110 sra X >> Y (arithmetically, do sign extend!)
111 slt if (X < Y) //Treat X and Y as SIGNED!
then result = 1 as a 16 bit 2's complement number
else result = 0 as a 16 bit 2's complement number

But wait, there's more!

Think about intuitive ways to test your ALU. If the grader can look at your logisim file and immediately see that everything is in working order, it will be to your advantage. You might consider some method for automatically testing your ALU, such as a counter. Perhaps you should add testing logic that signals an error if an incorrect value is seen. Think about this, we want to see some form of testing suite in your outer-most circuit design.

Not Allowed In This Assignment

You may only use tools from the "Base" and "Gates" libraries in Logisim. Do not use any items from the Memory, Plexers, Arithmetic, or Legacy libraries. Any ALU pieces built using any of these illegal components will be given no credit.

Details & Hints

Submission Details

Create a directory named 'hw7' containing the file alu.circ, and any additional files needed for your submission. While in that directory, run 'submit hw7'. If you included any additional files, make sure to say "yes" when the submit script prompts you about it.


This assignment was made possible thanks to work by Long Wei, Ben Sussman, and Paul Pearce.