College of Engineering

Department of Electrical Engineering and Computer Science

CS61C, Summer 2010

**Due Saturday, 07/24/2010 @ 11:59pm**

In this assignment, you will implement a 16 bit ALU in logisim.

The ~~nine~~ **eight** functions that you will implement are: add, subtract, OR, AND,
shift left logical, shift right logical, shift right arithmetic, set less than. ** ,
and EQUAL**. The
ALU will perform the desired function on two 16-bit inputs (

`X`

and `Y`

, where
`x0`

is the lowest order bit for `x`

, `y0`

is the lowest order bit for `y`

, etc...) and output the result on the 16-bit `Result`

bus.
The function will be determined by the value of a control signal (`Select`

), as
listed below.
In addition to the 16 bits of output produced in `Result`

, ~~three~~ **two**
additional outputs will be produced: `unsigned overflow`

and ```
signed
overflow
```

~~and ~~`equals`

.

`Unsigned overflow`

will have a high value**if and only if**the command was an add and unsigned overflow occured.`Signed overflow`

will have a high value**if and only if**the command was an add or a subtract, and signed overflow occured. (You do not need to worry about unsigned overflow for subtractions.)- The unsigned overflow indicator assumes that the two numbers being evaluated are both unsigned values. Likewise, the signed overflow indicator assumes the two numbers being evaluated are signed values.
- The way to think about these overflow indicators is a programmer sends two numbers to the ALU for evaluation, and the programmer knows the signed or unsigned nature of the numbers. Then the programmer chooses the appropriate indicator to look at, based on what he or she knows the values to be.

For the shift instructions detailed below (sll, srl, sra), the shift amount is
*ONLY* the least 4 significant bits of `Y`

. You can ignore the other bits of
`Y`

.

Here's what occurs for each operation:

Select | op | Result |
---|---|---|

000 |
or | X | Y |

001 |
and | X & Y |

010 |
add | X + Y (and signal if either overflow occurs) |

011 |
sub | X - Y (and signal if signed overflow occurs) |

100 |
sll | X << Y (logically, don't sign extend!) |

101 |
srl | X >> Y (logically, don't sign extend!) |

110 |
sra | X >> Y (arithmetically, do sign extend!) |

111 |
slt | if (X < Y) //Treat X and Y as SIGNED! then result = 1 as a 16 bit 2's complement number else result = 0 as a 16 bit 2's complement number |

Think about intuitive ways to test your ALU. If the grader can look at your logisim file and immediately see that everything is in working order, it will be to your advantage. You might consider some method for automatically testing your ALU, such as a counter. Perhaps you should add testing logic that signals an error if an incorrect value is seen. Think about this, we want to see some form of testing suite in your outer-most circuit design.

You may only use tools from the "Base" and "Gates" libraries in Logisim. Do not use any items from the Memory, Plexers, Arithmetic, or Legacy libraries. Any ALU pieces built using any of these illegal components will be given no credit.

**LABEL EVERYTHING!**- You can download Logisim for yourself as well as view more documentation at the logisim website: http://ozark.hendrix.edu/~burch/logisim/
- You can and
*should*use**multi-bit wires**! Before or after placing a gate you can select the bit width of that gate. This means the number of bits which run through the input and output pins of that gate. For example, a 2 bit wide AND gate with two wires coming in and 1 wire going out actually is taking a**4**bit input and a**2**bit output. The gate performs the one bit AND function on each respective pair of inputs: it ANDs the two lowest order bits and outputs the result on the lowest order bit of the output, etc... The wires will automatically be the width of the input/output pin they are connected to, and Logisim will be kind enough to immediately report any inconsistencies in pins connecting to the same wire. - Please use
**subcircuits**! They make it easier for you, they make it easier for us. Give your subcircuits appropriate labels as well. Keep in mind that this won't be autograded, and humans will have to look at your schematics (and grade them!). - The key to your sanity on this project is modularity. Don't be afraid to build subcircuits that are multiple levels deep.

Create a directory named 'hw7' containing the file alu.circ, and any additional files needed for your submission. While in that directory, run 'submit hw7'. If you included any additional files, make sure to say "yes" when the submit script prompts you about it.

This assignment was made possible thanks to work by Long Wei, Ben Sussman, and Paul Pearce.