Fourth Week - February 5 -9

Discussion Sections: 

Discussion of the physical basis for the terms in the MOS threshold voltage expression. Finding the depletion depth and capacitance at different locations in a layout including pn-junction and MOS-like structures. MOS current versus voltage graphs and modeling them algebraic relationships. Operating mode and drain current in NMOS and PMOS devices with various terminal voltages. Example of finding and applying small signal models.

Laboratories: 

Experiment #3 IC Resistors: This week you will make prelab estimates of resistance and then make actual measurements and compare results in lab. See the Prelab information on the lab news web page under updates.

Homework:

The homework is being graded on a scale of 0-10 and you must achieve an 8 or better in the initial grading to have mastered the homework on schedule. Questions about grading should be emailed to kobe@uclink4.berkeley.edu

2/5 Lecture 9 - MOS current versus voltage relationships will be developed by viewing the mobile charge as creating a conducing layer with a finite resistance that depends on the gate voltage and the local IR drop along the channel.             
Reading - H&S 4.1-4.3 

 

2/7 Lecture 10 - Comparison of the classic expression for the drain current as a function of gate and drain voltages to actual device curves. Generalization of the algebraic model to include threshold shifts with substrate bias and increased current at high drain voltage due to channel length modulation. Reading - H&S 4.1-4.3
Homework 4 - will be distributed
2/9 Lecture 11 - Concept of a small signal model. Development of a small-signal model for a MOS transistor. Use of the small signal model for analysis of a circuit.
Reading - H&S Chapter 4.5-4.5.3 
Homework #3 is due in box outside of 277 Cory on way into the classroom at start of class.

Designed and maintained by William Holtz
Version PM02/05/01