EECS20: Introduction to Real-Time Digital Systems

Lab08: Multiple Tones/Tones in Real Time


EECS20: Introduction to Real-Time Digital Systems
©1996 Regents of the University of California.
By K. H. Chiang, William T. Huang, Brian L. Evans.
URL: http://www-inst.eecs.berkeley.edu/~ee20
News: ucb.class.ee20
Assigned: 2 Apr 97, Checkoff: 9 Apr 97, Writeup Due: 11 Apr 97

Introduction

In this lab, we will study the generation of Touchtone (Dual-Tone Multiple Frequency or DTMF) on the C50. The following sections will guide you through a complete, working C50 code that generates a sequence of dial tones with proper pulse duration and pause intervals. In the writeup, you will write codes that generate sequences of musical notes.

What is Touchtone?

"Welcome to TeleBear. Please enter your eight digit student ID number...." Well, if your phone does not support touchtone, you will have to wait for the assistance of an operator. Each touchtone pulse represents a button on the keypad of your telephone. Each touchtone pulse is consisted of two tones. The low frequency indicates the row the button is located on the keypad; the high frequency indicates the column. So, the touchtone pulse is the sum of a pair of tones whose frequencies are selected from a low frequency group of four and a high frequency group of three, respectively, hence the name DTMF.

High-Frequency Group
1209 Hz1336 Hz1477 Hz
Low-
Frequency
Group
697 Hz
1
2
3
4
5
6
7
8
9
*
0
#
770 Hz
852 Hz
941 Hz

Frequency specs aren't the only ones DTMF tones have to meet; duration specs apply also. According to AT&T specs, 10 digits/sec (or 100 msec/digit) is the maximum data rate for touchtone signals. Within its 100 msec interval, a tone must be present for at least 45 msec and no more than 55. You will learn the rest of the story about touchtone in Laboratory 10.

A DTMF Coder

In this section, we will look into Texas Instruments' DTMF generation code dtmf.asm.

You should read the comment at the beginning of the assembly file. It explains the internal representation of the phone button, silence, end of sequence, etc. in terms of number. When you modify the code to play musical notes, you should write a new comment about your design of the internal representation of music notes.

Memory Management

Now, let's look at the assembly directives. The .ds directive tell the assembler to begin assembling source code into data memory. Its counter part for program memory is .ps. For this lab, you should pay attention to the address you use with these directives and make sure that you do not overlap your source codes or write into non-user spaces. Refer to page 1-4 in the TMS320C5x DSP Starter Kit User's Guide for the C5x DSK memory map.

We will skip the initialization of the Analog Interface Circuit (AIC) here, but notice that the "Conversion frequency" is an half of the sampling frequency. Also, we will ignore the part on C50 initialization.

The Main Loop

Let's look at the main loop of this program now. The new instructions here are CALL, CLRC, BCND, LACL. Please do read the TMS320C5x User's Guide on this instructions. Also, review the introduction on the indirect addressing mode to learn about the use of INDX in the addressing mode.

The main loop read the digit to be transmitted, call UNPACK to select the coefficients for sinusoidal waveform generation, call PAUSESH to run a counter loop for 50 msec in silence before enabling the receive interrupt (which is our sampling timer). This guarantees pause between pulses. After the interrupt is enabled, the main loop runs into a polling loop for the duration of the pulse except in the case of silence. You should figure out how this code handle the case of silence in subroutine UNPACK. The polling loop keeps on checking the content of address TIMER which is decremented by the RECEIVE interrupt service routine everytime an interrupt occurs.

Interrupt Service Routine

We have seen interrupts before this lab. In the previous labs, the DSP become idle until the timer drivened interrupt occur. In those cases, the DSP returns to the operations in the main loop directly. In this program, the output value is computed and transmitted during the interrupt before the DSP resume its original activities which are tracking the pulse duration, select coefficients for a new pulse, etc. Silence can be achieved through disabling the occurance of interrupts.

The output value is computed mainly by subroutine GENR8TOR. This subroutine illustrate a very efficient way to compute sinusoidal waveforms through difference equations. Please read about the instruction MADD and be ready to explain how the subrouting works. Also pay attention to how instructions EXAR and ADDB are used here.

The instruction RET--Return From Subroutine return the program to where the subroutine was called. The instruction RETE--Enable Interrupts and Return From Interrupt allows the DSP to resume its original execution at the point of interrupt.

Coefficient Selection and Pause Generation

The key instruction in UNPACK is BCND-- Branch Conditionally. You should be able to find a more efficient way to do the coefficient selection.

For the pause generation subroutines, notice that the cycle time is 50ns but some instruction takes more than one instruction to be completed. Also, the subroutine returns to different places if called from different places.

Writeup

In your writeup, concisely record your modification to the code and comment the code you write carefully.

  1. Modify dtmf.asm to generate a sequence of tones on the music scale. You should use no less then seven notes. Change the duration of the note to 1 sec.

  2. Modify the result from the previous question to allow user specified duration individual notes in a sequence.

  3. Improve the quality of your musical sequence by implementing one of the improvements introduced in Laboratory 03.


Glossary

ACC	Accumulator register that stores intermediate results
ADD	Add to ACC, a C50 instruction
ADDB	Add ACCB to ACC, a C50 instruction
AIC	Analog Interface Circuit that allows analog devices to be connected to the C50 DSK board
ALU	Arithmetic Logic Unit that adds, shifts, and performs logical operations.
APAC	Add PREG to ACC, a C50 instruction
AR	Auxiliary register that stores indirect pointer to addresses
ARn	Auxiliary register number n(0-7)
ARP	Auxiliary register pointer that points to currently used AR
B	Branch Unconditionally, a C50 instruction
BCND	Branch Conditionally, a C50 instruction
C50	Texas Instruments TMS 320C50 DSP processor (16-bit, 28.6/20 MIPS)
CALL	Call Unconditionally, a C50 instruction
CBCR	Circular buffer control register that selects ARn and enable/disable the buffers n(1,2)
CBERn	Circular buffer end register that stores the last address in the circular buffer n(1,2)
CBSRn	Circular buffer start register that stores the first address in the circular buffer
CLRC	Clear Control Bit, a C50 instruction
DMOV	Data Move in Data Memory, a C50 instruction
DP	Data memory page pointer that points to the current 128-byte page of data memory
DSK	DSP Starter Kit, a C50 development package
DSP	Digital Signal Processor, a special-purpose microprocessor
DXR	Data transmit register that stores samples to be transmitted to AIC
EXAR	Exchange ACCB with ACC, a C50 instruction
INDX	Index register for indirect addressing
LACC	Load ACC, a C50 instruction
LACL	Load Low ACC and Clear High ACC, a C50 instruction
LAMM	Load ACC with Memory-Mapped Register, a C50 instruction
LAR	Load ARn, a C50 instruction
MACD	Multiply and Accumulate with Data Move, a C50 instruction
MADD	Multiply and ACC with Data Move and Dynamic Addressing, a C50 instruction
MAR	Modify ARn and ARP, a C50 instruction
NEG	Negate ACC, a C50 instruction
PLU	Parallel logic unit that performs logical operations in parallel to ALU
PREG	Product register that stores multiplication results
RET	Return From Subroutine, a C50 instruction
RETE	Return From Interrupt, a C50 instruction
RCA	A connector standard
SACH	Shift Accumulator and Store High Word Result, a C50 instruction
SACL	Shift Accumulator and Store Low Word Result, a C50 instruction
SAMM	Store ACC to memory-mapped register, a C50 instruction
SPLK	Store long immediate to data memory location, a C50 instruction
ZAC	Zero ACC, a C50 instruction
ZAP	Zero ACC and PREG, a C50 instruction


Tze-yau William Ng Huang
Mon Mar 18 100:00 PST 1996