Electrical
Engineering 40, Fall 2008
Introduction
to Microelectronic Circuits
Lecture
Time:
10 Evans, MWF 1011
Course Objectives:
This course is intended to teach
basic circuit theory and principles of electronic engineering as preparation
for subsequent EE courses.
Course Format:
Three
hours lecture, three hours laboratory, one hour of discussion [4 Units].
Stay
with ONE Discussion and Lab session you registered.
Instructor:
Prof. Connie ChangHasnain
Office:
263M Cory Hall
Office
hours: M, Th 11:00  12:00 (263M Cory).
All emails to Prof. ChangHasnain should be forwarded by the Head
GSI (Mike, markm_at_eecs.berkeley.edu)
Secretary: eecsinstsupport_at_eecs.berkeley.edu,
253 Cory
GSIs:
All
GSI office hours will be held in 400A Cory
Discussions:
Michael
Mark (Head TA), Tu 12 pm 293 Cory, markm_at_eecs, office hours: Tu
24 pm
Lu
Ye, Th 34 pm and Th 45 pm
289 Cory, yelu_at_eecs, office hours: Tu 11 am1 pm
Shang
Jiang, M 23 pm and Th 23 pm 285 Cory, slj_at_berkeley, office hours: M / Th
34 pm
Labs (all labs take place in 140
Cory):
Evan
Reutzel (Lab Guru), W 25 pm and F 112 pm, ereutzel_at_berkeley,
office hours: M 23 pm, W 12 pm
Daniel
Wei, Tu 811 am, danielwei_at_berkeley,
office hours: Th 23 pm
Kevin
Wang, Th 112 pm, kevinwang_at_berkeley,
office hours: T 34 pm
Noah
JohnsonWalls, M 36 pm, noahj_at_berkeley, office
hours: F 121 pm
Patrick
Au, Th 58 pm, patrickau09_at_berkeley, office hours:
Th 11 am 12 pm
Updated Information, Supplemental
Material and Newsgroups:
Updated
information, supplemental material, newsgroups and updated grade information is
available at https://bspace.berkeley.edu .
You need
to login using your CalNet I.D. and sign up to the EE
40 – FA08 worksite. If you have any problems accessing the site, contact Mike
(markm_at_eecs.berkeley.edu)
Prerequisites:
Math 1B and Physics 7B.
Textbooks
and/or other required material:
Hambley,
Allan R., Electrical Engineering: Principles and Applications (4th ed.).
Upper Saddle River, NJ: Pearson Education, Inc., 2007.
Supplemental
notes and reader (on bSpace for download)
Discussion/laboratory
schedule:
Discussions
start 09/02/2008
Laboratory
sections start 09/08/08
Tests
and Final Dates:

Tests: Midterm 1: 10/01/08; Midterm
2: 10/27/08; Midterm 3:
12/03/08
all
during regular class time

Location: 10 Evans (+maybe another
location t.b.a.)

Test Review Session(s): Midterm 1
Review: 09/29/08; Midterm 2 Review:
10/24/08;
Midterm 3 Review: 12/01/08 all from 6:00  8:00 pm

Location: t.b.a.

Final: 8:00 – 11:00 am Saturday
12/13/2008 (Exam Group 1)

Location: t.b.a.

Final Review Session(s): 12/11/2008
10 am  11 am

Location: t.b.a.
Best Final Project Contest

45 pm, 12/10, Location t.b.a.

Winning projects will be displayed
on second floor Cory Hall for 6 months
Grading Policy:

9%:
10 HW sets  drop one lowest point; hence each is worth 1%

18%:
10 Labs
i.
7
structured experiments (each is worth 1.5%)
ii.
one
3week final project (7.5%)

39%:
3 tests – each one is worth 13%

34%:
Final exam

No
late HW or Lab reports accepted

No
makeup exams.

Departmental
grading policy:
i.
A
typical GPA for courses in the lower division is 2.7. This GPA would result,
for example, from 17% A's, 50% B's, 20% C's, 10% D's, and 3% F's.
Weekly
HW

Assignment on the web by 5 pm
Fridays, starting 09/05/08

Due 5 pm the following Friday in HW
box, 240 Cory.

On the top page, right top corner,
write your name (in the form: Last Name,
First
Name) with discussion section number.

Graded homework will be returned in
discussion sections.
Labs

Start on 09/08/2008

Each
lab is graded with 30% on Prelab and 70% on Report.

You
must complete the prelab section before going to the
lab. The prelabs are checked
by the GSIs at the beginning of each session.
If prelabs are completed during the lab
sessions, it is considered late and 50% will be deducted.

Lab
reports are due exactly one week after your lab is completed.

Grades will be entered into bSpace. It is your responsibility to check from time to
time to make sure all grades are entered correctly.

Stick with the lab session you have
signed up for
Classroom
Rules:

Please come to class on time.

Turn off cell phones, pagers, radio,
CD, DVD, etc.

No food or pets.

Do not come in and out of classroom.
Catalog
Description:
Fundamental circuit concepts and
analysis techniques. Kirchoff's laws, nodal analysis;
independent and dependent sources. Thevenin, Norton
equivalent circuits. Transient and AC analysis; speed and power. Phasors, Bode plots and transfer function. Filters and
OpAmps. Graphical methods for nonlinear circuits. Gauss’s Law and bandgap. Diode and FET characteristics. Diode and MOSFET
circuits. Introduction to basic integratedcircuit technology and layout.
Digital signals, logic gates, switching.
An electronics laboratory is part of
the course. Using and understanding electronics laboratory equipment such as:
oscilloscope, power supplies, function generator, multimeter,
curvetracer, and RLC meter. Includes a term project of constructing a circuit
with appropriate electromechanical device.
Topics
covered:

Introduction
to circuits: currents, and voltages; power and energy; Kirchhoff’s Current Law;
Kirchhoff’s Voltage Law; branches, loops and nodes; Resistive circuits; Thévenin and Norton equivalent circuits;
Node/Mesh/Superposition analysis

Inductance
and capacitance; L and C transients; 1^{st}
and 2^{nd} order circuits

Phasors;
Frequency response; Bode plots; Resonance; Transfer function; Filters (1^{st}
and 2^{nd} order filters)

Operational
Amplifiers: Ideal operational amplifiers; Inverting and noninverting
amplifiers; Design of simple amplifiers; Opamp imperfections in the linear range
of operation; Integrators and differentiators;

Diode
circuits: Basic concepts; Loadline analysis of diode circuits; Idealdiode
model; Piecewiselinear diode models; Rectifier circuits; voltage doubler

Semiconductors;
n and p doping; bandgap

Diode
physics: Gauss’s Law and Poisson Equation; Depletion approximation; IV
characteristics

MOSFET:
NMOS and PMOS transistors and simple fabrication concepts; Loadline analysis;
Bias circuits

Binary
logic, truth tables: inversion, NAND and NOR; CMOS logic gates