due Wednesday April 24
(40 point assignment):
Use the LogicWorks program – available to you in various computer rooms
on the first floor of Cory Hall, as described on the web site link that
also gives you user names to access NT machines there – to simulate one
stage of a full adder for adding two binary numbers, A and B. The
full
adder should be composed of only AND, OR, and NOT gates. Note that
there is a tutorial on the use of LogicWorks on the web site. Also,
since the program is capable of producing circuit drawings that cover as
many as 32 pages (!), please center the circuit on the first page so
that it all prints on a single sheet of printer paper.
The text (S&O) describes the half-adder and shows that the nth stage
of
the full adder will have three inputs – the binary quantities
representing the nth bits of A and of B, and the carry bit from the
(n-1)th section of the adder.
You might try to simplify your sum-of-products realization using Boolean
algebra, for example, before drawing and testing the circuit.
Turn in a printout of the network of gates you used, and the timing
diagram of the circuit’s response at significant points in the circuit
as you step through the values of the two input variables An and Bn.