10 Evans, MWF 1-2
course is intended to teach basic circuit theory and principles of electronic
engineering as preparation for subsequent EE courses.
Three hours lecture, three hours laboratory, one hour
of discussion [4 Units].
Stay with ONE Discussion and Lab session you
Prof. Venkat Anantharam
Office: 271 Cory Hall
Office hours: Mondays 2 - 3 pm (212 Cory), Thursdays 3 - 4 pm (258 Cory). If Prof. Anantharam
is not in those rooms, please check his office in 271 Cory
All emails to Prof. Anantharam should be forwarded by the Head GSI (Bart, firstname.lastname@example.org)
1B and Physics 7B.
and/or other required material:
Allan R., Electrical Engineering: Principles and Applications (4th ed.). Upper Saddle River, NJ: Pearson Education,
notes and reader (on line for download)
Office Hours, Discussion and Laboratory Sections Begin
Tests and Final Dates:
Tests: Midterm 1: 02/22/08; Midterm 2: 03/19/08; Midterm 3: 05/07/08
Location: Announced a week before the test
Test Review Session(s): Midterm 1 Review: 02/19/08; Midterm 2 Review: 03/17/08; Midterm 3 Review: 05/05/08
Location: Announced a week before the review.
Final: 12:30 – 3:30 pm Friday
05/16/2008 (Exam Group 5)
Location: Announced a week before the final
- 9%: 10 HW sets (drop lowest score)
- 18% labs: 10 Labs
i. 7 structured experiments (each is worth 1.5%)
ii. one 3-week final project (7.5%)
- 39%: 3 tests, each worth 13% (NO dropping of lowest test)
- 34%: Final exam
No late HW or Lab reports
No make-up exams
Assignment on the web by 5 pm
Fridays, starting 01/25/08
Due 5 pm the following Friday
in HW box, 240 Cory.
On the top page, right top corner,
write your name (in the form: Last Name, First Name) with lab section day and time.
Graded homework will be returned
in lab sections.
Each lab is graded with 30% on
Prelab and 70% on Report.
You must complete the prelab section
before going to the lab. The prelabs are checked by the GSIs at the beginning
of each session. If prelabs are completed during the lab sessions, it is
considered late and 50% will be deducted.
Lab reports are due exactly one
week after your lab is completed.
Please come to class on time.
Turn off cell phones, pagers,
radio, CD, DVD, etc.
No food or pets.
Do not come in and out of
Lectures will be recorded and
circuit concepts and analysis techniques. Kirchoff's laws, nodal analysis;
independent and dependent sources. Thevenin, Norton equivalent circuits.
Transient and AC analysis; speed and power. Phasors, Bode plots and transfer
function. Filters and Op-Amps. Graphical methods for nonlinear circuits.
GaussÕs Law and bandgap. Diode and FET characteristics. Diode and MOSFET
circuits. Introduction to basic integrated-circuit technology and layout.
Digital signals, logic gates, switching.
electronics laboratory is part of the course. Using and understanding
electronics laboratory equipment such as: oscilloscope, power supplies,
function generator, multimeter, curve-tracer, and RLC meter. Includes a term
project of constructing a circuit with appropriate electromechanical device.
Introduction to circuits:
currents, and voltages; power and energy; Kirchhoff's Current Law; Kirchhoff's
Voltage Law; branches, loops and nodes
Resistive circuits; Thevenin and
Norton equivalent circuits; Node/Mesh/Superposition analysis
Inductance and capacitance; L and
C transients; 1st and 2nd order circuits
Phasors; Frequency response; Bode
plots; Resonance; Transfer function; Filters (1st and 2nd
Operational Amplifiers: Ideal
operational amplifiers; Inverting and non-inverting amplifiers; Design of
simple amplifiers; Op-amp imperfections in the linear range of operation;
Integrators and differentiators;
Diode circuits: Basic concepts;
Load-line analysis of diode circuits; Ideal-diode model; Piecewise-linear diode
models; Rectifier circuits; voltage doubler
Semiconductors; n and p doping;
Diode physics: Gauss's Law and
Poisson Equation; Depletion approximation; IV characteristics
MOSFET physics: NMOS and PMOS
transistors and simple fabrication concepts
MOSFET circuits: Load-line
analysis; Bias circuits
Binary logic, truth tables:
inversion, NAND and NOR
- Logic circuits: CMOS logic gates