Lab 1 - Introduction to Workview
Lab 2 - Finite State Machine in Workview
Lab 3 - Finite State Machine on Xilinx
Lab 5 - Shift Registers and Counters
Spring 1999 Notes
Spring 1998 Notes page 1,
2,
3,
4,
5
Lab 6 - Nasty Realities
Reading
Capacitor Values
Checkpoint 1 - Serial Sender - tentative
Checkpoint 2 - Video Interface - tentative
Checkpoint 3 - Data Path and saving Video data to SRAM - tentative
Checkpoint 4 - Mode 1 - tentative
Checkpoint 5 - Mode 2 - tentative