EE 194/290C | 28nm SoC for IoT: The Tapeout Class

Spring 2018


The schedule is tentative and still subject to change.

Wk Date Lecture Topic Milestone
001/16 TuCourse Information and OverviewForm groups, choose systems to work on
01/18 ThAlumni Panel
101/23 TuChisel BootcampLearn Chisel
Learn about system, create goals
List of must-have features
List stretch goals
01/25 ThWireless Basics
201/30 TuWireless ArchitectureStart implementing basic version of block
Checkpoint 1
02/01 ThWireless Architecture and Modelling
302/06 TuStart testing in Verilator/simulation
02/08 ThGuest Lecture (Fri 2/9, 10am-noon): Dr. Andreia Cathelin from ST
402/13 TuStart testing with neighbouring blocks
02/15 Th
502/20 Tu
02/22 Th
602/27 TuAnalog schematic design
Start FPGA testing
03/01 Th
703/06 TuBLE Guide (David Burnett)Start testing with entire digital system
03/08 Th
803/13 Tu28nm Layout Tips (John Wright)Analog layout
03/15 Th
903/20 TuFirst tape-in
03/22 Th
1003/27 TuNo lecture – Spring breakTake a relaxing and much needed break
03/29 ThNo lecture – Spring break
1104/03 TuSecond tape-in
System co-simulations
04/05 Th
1204/10 TuPhysical Design: RTL to GDS (Edward Wang)System co-simulations
04/12 ThRocket-chip, and Diplomacy, and TileLink (Colin Schmidt)
1304/17 TuThird tape-in
04/19 Th
1404/24 TuDRC/LVS
04/26 Th
1505/01 TuDRC/LVS
05/03 Th
1605/08 TuDRC/LVS
05/10 Th
1705/15 TuFinish final DRC/LVS fixes
GDS streamout
Submit final reports
Hell is over???
05/17 Th

Labs / Homework


Course Staff

Instructors / GSIs

Osama Khan

Kristofer Pister

Edward Wang


Sahar Mesri's thesis - covers in detail the digital system of the Single Chip Mote (SCuM) project. Although our BLE digital system won't be exactly the same, it has many similar modules.


BLE 5 specification, Volume 6 - we will use this document as a reference for meeting the BLE wireless standard specification for the SoC.
Commercial BLE chip - we will use this commercial Bluetooth SoC's datasheet as a reference.


DMA overview slides - high-level overview/review of DMA.
Howard Mao's MS thesis - high-bandwidth memcpy/DMA accelerator within L2 cache and main memory.
riscv-dma3 - a RoCC implementation of DMA for rocket-chip. Likely too complex for our chip, but maybe worth a look.


Elad Alon's thesis - "Measurement and Regulation of On-Chip Power Supply Noise": a useful resource for designing the on-chip regulators and references.

Digital Design

VLSI: the fab/design interface - overview and history of VLSI.
Combinational logic and blocks - introduction and overview of combinational logic.
Sequential logic from EECS151 Fall 2016 - introduction and overview of sequential logic.


Course Communication

The instructors and TA will post announcements, clarifications, hints, etc. on Piazza. Hence you must check the Piazza page frequently throughout the term. (You should already have access to the forum. If you do not, please let us know.) If you have a question, your best option is to post a message there. The staff (instructors and TAs) will check the forum regularly, and if you use the forum, other students will be able to help you too.

In addition to Piazza, we will also be using the EE 194 Slack workspace to faciliate communication and co-ordination. You should have already received an invitation to join - please contact the instructors/GSI if you do not have access.